Patents by Inventor Li-Guo LEE
Li-Guo LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11217548Abstract: A semiconductor device structure and a manufacturing method are provided. The semiconductor device structure includes a semiconductor substrate and a dielectric layer over the semiconductor substrate. The semiconductor device structure also includes a conductive trace over the dielectric layer. The semiconductor device structure further includes a conductive feature over the conductive trace, and a width of the conductive feature is substantially equal to or larger than a maximum width of the conductive trace. In addition, the semiconductor device structure includes a conductive bump over the conductive feature.Type: GrantFiled: December 13, 2018Date of Patent: January 4, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Li-Guo Lee, Yung-Sheng Liu, Yi-Chen Liu, Yi-Jen Lai, Chun-Jen Chen, Hsi-Kuei Cheng
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Patent number: 11145613Abstract: Methods for forming semiconductor structures are provided. The method for forming a semiconductor structure includes forming a metal pad over a first substrate and forming a resist layer having an opening over the metal layer. The method for forming a semiconductor structure further includes forming a conductive pillar and a solder layer over the conductive pillar in the opening of the resist layer and removing the resist layer. The method for forming a semiconductor structure further includes removing a portion of the conductive pillar so that the conductive pillar has an angled sidewall.Type: GrantFiled: September 7, 2018Date of Patent: October 12, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTDInventors: Li-Guo Lee, Yung-Sheng Liu, Yi-Chen Liu, Yi-Jen Lai, Chun-Jen Chen, Hsi-Kuei Cheng
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Publication number: 20190131264Abstract: A semiconductor device structure and a manufacturing method are provided. The semiconductor device structure includes a semiconductor substrate and a dielectric layer over the semiconductor substrate. The semiconductor device structure also includes a conductive trace over the dielectric layer. The semiconductor device structure further includes a conductive feature over the conductive trace, and a width of the conductive feature is substantially equal to or larger than a maximum width of the conductive trace. In addition, the semiconductor device structure includes a conductive bump over the conductive feature.Type: ApplicationFiled: December 13, 2018Publication date: May 2, 2019Inventors: Li-Guo Lee, Yung-Sheng Liu, Yi-Chen Liu, Yi-Jen Lai, Chun-Jen Chen, Hsi-Kuei Cheng
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Publication number: 20190019772Abstract: Methods for forming semiconductor structures are provided. The method for forming a semiconductor structure includes forming a metal pad over a first substrate and forming a resist layer having an opening over the metal layer. The method for forming a semiconductor structure further includes forming a conductive pillar and a solder layer over the conductive pillar in the opening of the resist layer and removing the resist layer. The method for forming a semiconductor structure further includes removing a portion of the conductive pillar so that the conductive pillar has an angled sidewall.Type: ApplicationFiled: September 7, 2018Publication date: January 17, 2019Inventors: Li-Guo LEE, Yung-Sheng LIU, Yi-Chen LIU, Yi-Jen LAI, Chun-Jen CHEN, Hsi-Kuei CHENG
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Patent number: 10163843Abstract: A semiconductor device structure and a manufacturing method are provided. The semiconductor device structure includes a semiconductor substrate and a dielectric layer over the semiconductor substrate. The semiconductor device structure also includes a conductive trace over the dielectric layer. The semiconductor device structure further includes a conductive feature over the conductive trace, and a width of the conductive feature is substantially equal to or larger than a maximum width of the conductive trace. In addition, the semiconductor device structure includes a conductive bump over the conductive feature.Type: GrantFiled: October 27, 2017Date of Patent: December 25, 2018Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Li-Guo Lee, Yung-Sheng Liu, Yi-Chen Liu, Yi-Jen Lai, Chun-Jen Chen, Hsi-Kuei Cheng
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Patent number: 10090267Abstract: A semiconductor structure is provided. The semiconductor structure includes a first substrate and a metal pad formed over the first substrate. The semiconductor structure further includes a modified conductive pillar having a top portion and a bottom portion formed over the metal pad and a solder layer formed over the modified conductive pillar. In addition, the top portion of the modified conductive pillar has a first sidewall in a first direction and a bottom portion of the modified conductive pillar has a second sidewall in a second direction different from the first direction.Type: GrantFiled: March 13, 2014Date of Patent: October 2, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTDInventors: Li-Guo Lee, Yung-Sheng Liu, Yi-Chen Liu, Yi-Jen Lai, Chun-Jen Chen, Hsi-Kuei Cheng
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Patent number: 9997482Abstract: A semiconductor structure is provided. The semiconductor structure includes a first substrate and a metal pad formed over the first substrate. The semiconductor structure further includes a solder stud formed over the metal pad, and the solder stud has a flat top surface parallel to a top surface of the first substrate.Type: GrantFiled: March 13, 2014Date of Patent: June 12, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Li-Guo Lee, Yi-Chen Liu, Yung-Sheng Liu, Yi-Jen Lai, Chun-Jen Chen, Hsi-Kuei Cheng
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Publication number: 20180068967Abstract: A semiconductor device structure and a manufacturing method are provided. The semiconductor device structure includes a semiconductor substrate and a dielectric layer over the semiconductor substrate. The semiconductor device structure also includes a conductive trace over the dielectric layer. The semiconductor device structure further includes a conductive feature over the conductive trace, and a width of the conductive feature is substantially equal to or larger than a maximum width of the conductive trace. In addition, the semiconductor device structure includes a conductive bump over the conductive feature.Type: ApplicationFiled: October 27, 2017Publication date: March 8, 2018Inventors: Li-Guo Lee, Yung-Sheng Liu, Yi-Chen Liu, Yi-Jen Lai, Chun-Jen Chen, Hsi-Kuei Cheng
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Publication number: 20180033756Abstract: Methods for forming semiconductor structures are provided. The method for forming a semiconductor structure includes forming a metal pad over a first substrate and forming a polymer layer over the metal pad. The method for forming a semiconductor structure further includes forming a seed layer over the metal pad and extending over the polymer layer and forming a conductive pillar over the seed layer. The method for forming a semiconductor structure further includes wet etching the seed layer using an etchant comprising H2O2. In addition, the step of wet etching the seed layer is configured to form an extending portion having a slope sidewall.Type: ApplicationFiled: October 5, 2017Publication date: February 1, 2018Inventors: Li-Guo LEE, Yi-Chen LIU, Yung-Sheng LIU, Yi-Jen LAI, Chun-Jen CHEN, Hsi-Kuei CHENG
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Patent number: 9806046Abstract: A semiconductor device structure and a manufacturing method are provided. The semiconductor device structure includes a semiconductor substrate and a dielectric layer over the semiconductor substrate. The semiconductor device structure also includes a conductive trace over the dielectric layer. The semiconductor device structure further includes a conductive feature over the conductive trace, and a width of the conductive feature is substantially equal to or larger than a maximum width of the conductive trace. In addition, the semiconductor device structure includes a conductive bump over the conductive feature.Type: GrantFiled: March 13, 2014Date of Patent: October 31, 2017Assignee: Taiwan Semiconductor Manufacturing Co., LtdInventors: Li-Guo Lee, Yung-Sheng Liu, Yi-Chen Liu, Yi-Jen Lai, Chun-Jen Chen, Hsi-Kuei Cheng
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Patent number: 9779969Abstract: A package structure and a manufacturing method are provided. The package structure includes a semiconductor substrate and a first conductive feature over the semiconductor substrate. The package structure also includes a substrate and a second conductive feature over the substrate. The second conductive feature is bonded with the first conductive feature through a bonding structure. The package structure further includes a protection material surrounding the bonding structure, and the protection material is in direct contact with a side surface of the first conductive feature.Type: GrantFiled: March 13, 2014Date of Patent: October 3, 2017Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Li-Guo Lee, Yung-Sheng Liu, Yi-Chen Liu, Yi-Jen Lai, Chun-Jen Chen, Hsi-Kuei Cheng
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Patent number: 9735123Abstract: A semiconductor device structure and a manufacturing method are provided. The method includes forming a conductive pillar over a semiconductor substrate. The method also includes forming a solder layer over the conductive pillar. The method further includes forming a water-soluble flux over the solder layer. In addition, the method includes reflowing the solder layer to form a solder bump over the conductive pillar and form a sidewall protection layer over a sidewall of the conductive pillar during the solder layer is reflowed.Type: GrantFiled: March 13, 2014Date of Patent: August 15, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Li-Guo Lee, Yi-Chen Liu, Yung-Sheng Liu, Yi-Jen Lai, Chun-Jen Chen, Hsi-Kuei Cheng
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Publication number: 20150262846Abstract: A package structure and a manufacturing method are provided. The package structure includes a semiconductor substrate and a first conductive feature over the semiconductor substrate. The package structure also includes a substrate and a second conductive feature over the substrate. The second conductive feature is bonded with the first conductive feature through a bonding structure. The package structure further includes a protection material surrounding the bonding structure, and the protection material is in direct contact with a side surface of the first conductive feature.Type: ApplicationFiled: March 13, 2014Publication date: September 17, 2015Applicant: Taiwan Semiconductor Manufacturing Co., LtdInventors: Li-Guo LEE, Yung-Sheng LIU, Yi-Chen LIU, Yi-Jen LAI, Chun-Jen CHEN, Hsi-Kuei CHENG
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Publication number: 20150262954Abstract: A semiconductor structure is provided. The semiconductor structure includes a first substrate and a metal pad formed over the first substrate. The semiconductor structure further includes a solder stud formed over the metal pad, and the solder stud has a flat top surface parallel to a top surface of the first substrate.Type: ApplicationFiled: March 13, 2014Publication date: September 17, 2015Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Li-Guo LEE, Yi-Chen LIU, Yung-Sheng LIU, Yi-Jen LAI, Chun-Jen CHEN, Hsi-Kuei CHENG
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Publication number: 20150262951Abstract: A semiconductor structure is provided. The semiconductor structure includes a first substrate and a metal pad formed over the first substrate. The semiconductor structure further includes a modified conductive pillar having a top portion and a bottom portion formed over the metal pad and a solder layer formed over the modified conductive pillar. In addition, the top portion of the modified conductive pillar has a first sidewall in a first direction and a bottom portion of the modified conductive pillar has a second sidewall in a second direction different from the first direction.Type: ApplicationFiled: March 13, 2014Publication date: September 17, 2015Applicant: Taiwan Semiconductor Manufacturing Co., LtdInventors: Li-Guo LEE, Yung-Sheng LIU, Yi-Chen LIU, Yi-Jen LAI, Chun-Jen CHEN, Hsi-Kuei CHENG
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Publication number: 20150262955Abstract: A semiconductor device structure and a manufacturing method are provided. The semiconductor device structure includes a semiconductor substrate and a dielectric layer over the semiconductor substrate. The semiconductor device structure also includes a conductive trace over the dielectric layer. The semiconductor device structure further includes a conductive feature over the conductive trace, and a width of the conductive feature is substantially equal to or larger than a maximum width of the conductive trace. In addition, the semiconductor device structure includes a conductive bump over the conductive feature.Type: ApplicationFiled: March 13, 2014Publication date: September 17, 2015Applicant: Taiwan Semiconductor Manufacturing Co., LtdInventors: Li-Guo LEE, Yung-Sheng LIU, Yi-Chen LIU, Yi-Jen LAI, Chun-Jen CHEN, Hsi-Kuei CHENG
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Publication number: 20150262953Abstract: A semiconductor device structure and a manufacturing method are provided. The method includes forming a conductive pillar over a semiconductor substrate. The method also includes forming a solder layer over the conductive pillar. The method further includes forming a water-soluble flux over the solder layer. In addition, the method includes reflowing the solder layer to form a solder bump over the conductive pillar and form a sidewall protection layer over a sidewall of the conductive pillar during the solder layer is reflowed.Type: ApplicationFiled: March 13, 2014Publication date: September 17, 2015Applicant: Taiwan Semiconductor Manufacturing Co., LtdInventors: Li-Guo LEE, Yi-Chen LIU, Yung-Sheng LIU, Yi-Jen LAI, Chun-Jen CHEN, Hsi-Kuei CHENG
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Publication number: 20150262952Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a first substrate and a metal pad formed over the first substrate. The semiconductor structure further includes a seed layer formed over the metal pad and a conductive pillar formed over the seed layer. In addition, the seed layer has a sidewall and a bottom surface, and an angle between the sidewall and the bottom surface of the seed layer is in a range from about 20° to about 90°.Type: ApplicationFiled: March 13, 2014Publication date: September 17, 2015Applicant: Taiwan Semiconductor Manufacturing Co., LtdInventors: Li-Guo LEE, Yi-Chen LIU, Yung-Sheng LIU, Yi-Jen LAI, Chun-Jen CHEN, Hsi-Kuei CHENG