Abstract: A semiconductor device includes a first dielectric layer, a stack of semiconductor layers disposed over the first dielectric layer, a gate structure wrapping around each of the semiconductor layers and extending lengthwise along a direction, and a dielectric fin structure and an isolation structure disposed on opposite sides of the stack of semiconductor layers and embedded in the gate structure. The dielectric fin structure has a first width along the direction smaller than a second width of the isolation structure along the direction. The isolation structure includes a second dielectric layer extending through the gate structure and the first dielectric layer, and a third dielectric layer extending through the first dielectric layer and disposed on a bottom surface of the gate structure and a sidewall of the first dielectric layer.

Abstract: A method of forming a semiconductor transistor device. The method comprises forming a channel structure over a substrate and forming a first source/drain structure and a second source/drain structure on opposite sides of the fin structure. The method further comprises forming a gate structure surrounding the fin structure. The method further comprises flipping and partially removing the substrate to form a back-side capping trench while leaving a lower portion of the substrate along upper sidewalls of the first source/drain structure and the second source/drain structure as a protective spacer. The method further comprises forming a back-side dielectric cap in the back-side capping trench.

Abstract: In some embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure includes a substrate. A gate electrode is over the substrate and a spacer structure laterally surrounds the gate electrode. A conductive via is disposed on the gate electrode. A liner is arranged along one or more sidewalls of the spacer structure. The conductive via has a bottommost surface that has a larger width than a part of the conductive via that is laterally adjacent to one or more interior sidewalls of the liner.

Abstract: A method includes forming a gate stack on a first portion of a semiconductor substrate, removing a second portion of the semiconductor substrate on a side of the gate stack to form a recess, growing a semiconductor region starting from the recess, implanting the semiconductor region with an impurity, and performing a melt anneal on the semiconductor region. At least a portion of the semiconductor region is molten during the melt anneal.

Abstract: Semiconductor structures and methods are provided. An exemplary method includes depositing a first conductive material layer over a substrate, patterning the first conductive material layer to form a first conductor plate over the substrate, forming a first high-K dielectric layer over the first conductor plate, forming a second high-K dielectric layer on the first high-K dielectric layer, forming a third high-K dielectric layer on the second high-K dielectric layer, and forming a second conductor plate over the third high-K dielectric layer and vertically overlapped with the first conductor plate, where a composition of the first high-K dielectric layer is the same as a composition of the third high-K dielectric layer and is different from a composition of the second high-K dielectric layer.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first insulating layer over a substrate. A first metal feature is formed in the first insulating layer and a second insulating layer is formed over the first insulating layer. A first metal via is formed through the second insulating layer to connect the first metal feature. A second metal feature is formed over the second insulating layer. The second metal feature has a convex top surface and a plane bottom surface, and the plane bottom is electrically connected to the first metal feature through the first metal via.

Abstract: A semiconductor structure includes one or more channel layers; a gate structure engaging the one or more channel layers; a first source/drain feature connected to a first side of the one or more channel layers and adjacent to the gate structure; a first dielectric cap disposed over the first source/drain feature, wherein a bottom surface of the first dielectric cap is below a top surface of the gate structure; a first via disposed under and electrically connected to the first source/drain feature; and a power rail disposed under and electrically connected to the first via.

Abstract: A semiconductor device includes a source/drain feature over a semiconductor substrate, channel layers over the semiconductor substrate and connected to the source/drain feature, a gate portion between vertically adjacent channel layers, and an inner spacer between the source/drain feature and the gate portion and between adjacent channel layers. The semiconductor device further includes an air gap between the inner spacer and the source/drain feature.

Abstract: A method of manufacturing a semiconductor device includes forming a multi-layer stack of alternating first layers of a first semiconductor material and second layers of a second semiconductor material on a semiconductor substrate, forming a first recess through the multi-layer stack, and laterally recessing sidewalls of the second layers of the multi-layer stack. The sidewalls are adjacent to the first recess. The method further includes forming inner spacers with respective seams adjacent to the recessed second layers of the multi-layer stack and performing an anneal treatment on the inner spacers to close the respective seams.

Abstract: An antenna device and a method for configuring the same are provided. The antenna device includes a grounding metal, a grounding part, a radiating part, a feeding part, a proximity sensor, and a sensing metal. The radiating part is electrically connected to the grounding metal through the grounding part. The feeding part is coupled to the grounding metal through a feeding point. The sensing metal is electrically connected to the proximity sensor. The sensing metal is separated from the radiating part at a distance. The distance is less than or equal to one thousandth of a wavelength corresponding to an operating frequency of the antenna device.

Abstract: A semiconductor package including two different adhesives and a method of forming are provided. The semiconductor package may include a package component having a semiconductor die bonded to a substrate, a first adhesive over the substrate, a heat transfer layer on the package component, and a lid attached to the substrate by a second adhesive. The first adhesive may encircle the package component and the heat transfer layer. The lid may include a top portion on the heat transfer layer and the first adhesive, and a bottom portion attached to the substrate and encircling the first adhesive. A material of the second adhesive may be different from a material of the first adhesive.

Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a first package including at least one first semiconductor die encapsulated in an insulating encapsulation and through insulator vias electrically connected to the at least one first semiconductor die, a second package including at least one second semiconductor die and conductive pads electrically connected to the at least one second semiconductor die, and solder joints located between the first package and the second package. The through insulator vias are encapsulated in the insulating encapsulation. The first package and the second package are electrically connected through the solder joints. A maximum size of the solder joints is greater than a maximum size of the through insulator vias measuring along a horizontal direction, and is greater than or substantially equal to a maximum size of the conductive pads measuring along the horizontal direction.

Abstract: A wheel control mechanism includes a support base, a wheel module, a first magnetic module and a second magnetic module. The wheel module, the first magnetic module and the second magnetic module are installed on the support base. The first magnetic module generates a magnetic attractive force to attract a metal ratchet of the wheel module. By adjusting the position of the second magnetic module relative to the first magnetic module, the strength of the magnetic attractive force is changed. Consequently, the rotation of the wheel module results in a tactile feel or does not result in the tactile feel.

Abstract: Semiconductor devices including air spacers formed in a backside interconnect structure and methods of forming the same are disclosed. In an embodiment, a device includes a first transistor structure; a front-side interconnect structure on a front-side of the first transistor structure; and a backside interconnect structure on a backside of the first transistor structure, the backside interconnect structure including a first dielectric layer on the backside of the first transistor structure; a first via extending through the first dielectric layer, the first via being electrically coupled to a first source/drain region of the first transistor structure; a first conductive line electrically coupled to the first via; and an air spacer adjacent the first conductive line, the first conductive line defining a first side boundary of the air spacer.

Abstract: Semiconductor devices and methods of forming the same are provided. In one embodiment, a semiconductor device includes a gate structure sandwiched between and in contact with a first spacer feature and a second spacer feature, a top surface of the first spacer feature and a top surface of the second spacer feature extending above a top surface of the gate structure, a gate self-aligned contact (SAC) dielectric feature over the first spacer feature and the second spacer feature, a contact etch stop layer (CESL) over the gate SAC dielectric feature, a dielectric layer over the CESL, a gate contact feature extending through the dielectric layer, the CESL, the gate SAC dielectric feature, and between the first spacer feature and the second spacer feature to be in contact with the gate structure, and a liner disposed between the first spacer feature and the gate contact feature.

Abstract: A computing device is provided, which includes a volatile memory, a non-volatile memory, and a processor. A processor is configured to execute a main virtual machine for: during a detection period, detecting a cold area used by the main virtual machine from the volatile memory and the non-volatile memory; transmitting first data belonging to the cold area in the volatile memory and the non-volatile memory to a backup device; when determining that a first transmission condition is satisfied, transmitting a second data used by the main virtual machine in the volatile memory and the non-volatile memory to the backup device; and when determining that an abnormal event has occurred, notifying the abnormal event to the backup device, so as to execute a backup virtual machine in the backup device according to the first data and the second data.

Abstract: A method of measuring optical properties of a specimen includes generating illumination light at a plurality of illumination wavelengths and, for each of the plurality of illumination wavelengths, directing the illumination light to impinge on the specimen, collecting sample light passing through the specimen, and detecting the collected sample light using a polarization state analyzer to form a set of polarization channels. The method also includes receiving a calibration tensor, converting the set of polarization channels for each of the illumination wavelengths into Stokes parameter maps using the calibration tensor, denoising the Stokes parameter maps, and deconvolving the Stokes parameter maps to provide density, anisotropy, and orientation measurements of the specimen. The method can multiplex intrinsic density, anisotropy, and orientation measurements of the specimen and density, anisotropy, and orientation measurements of labeled fluorescent molecules.

Abstract: The present invention includes a main device and a backup device. A first backup system element of the main device is used to determine whether a first estimated time is less than a second estimated time. The first estimated time is a time period for directly transmitting pending data. The second estimated time is a time period for transmitting the pending data after the pending data is compressed by a current compression algorithm. If yes, the first backup system element directly transmits the pending data to a second backup system element of the backup device. If not, the first backup system element compresses the pending data by the current compression algorithm, updates the pending data and the current compression algorithm, and re-determines whether the first estimated time is less than the second estimated time. The present invention improves availability of data backup when a network bandwidth is poor.

Abstract: A method of measuring optical properties of a specimen, for example, a uniaxial specimen, includes generating a plurality of illumination patterns incident on the specimen and, for each of the plurality of illumination patterns, collecting sample light passing through the specimen and detecting the collected sample light using a polarization state analyzer to form a set of polarization channels. The method also includes receiving a calibration tensor, converting the set of polarization channels for each of the illumination patterns into Stokes parameter maps using the calibration tensor, and deconvolving the Stokes parameter maps to provide volumetric measurement of permittivity tensor of the specimen, specifically, absorption, optical path length, optical anisotropy, and 3D orientation of the specimen.

Abstract: To automatically evaluate the reasonable price of real estate according to the housing data, the present invention discloses a novel intelligent property evaluation system. The system includes the following components: a housing data input system, a pre-processing filter, a feature extractor, a housing price trainer, and a housing price predictor, wherein the housing price predictor further includes a regression model generator and a decision integrator. The pre-processing filter is used to filter unreasonable samples from housing data and integrate synonymous features. The feature extractor is used to choose required variables of housing price model. The housing price trainer generates housing price model which is trained by a great amount of housing data. The housing price predictor then generates a prediction by the trained model. Furthermore, to maintain the accuracy of prediction under the social evolution, the housing price predictor could be regularly or irregularly updated by a rolling-based method.