Patents by Inventor Li-Huei Chen

Li-Huei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240144467
    Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Huei Chen, Pei-Chao Su, Xiaomeng Chen, Chan-Ming Chang, Shih-Yung Chen, Hung-Yi Chung, Kuang-Shing Chen, Li-Jou Lee, Yung-Cheng Lin, Wei-Chen Wu, Shih-Chang Wang, Chien-An Lin
  • Publication number: 20240145481
    Abstract: A semiconductor structure includes a first transistor, a second transistor, a first dummy source/drain, a third transistor, a fourth transistor, and a second dummy source/drain. The first transistor and a second transistor adjacent to the first transistor are at a first elevation. The first dummy source/drain is disposed at the first elevation. The third transistor and a fourth transistor adjacent to the third transistor, are at a second elevation different from the first elevation. The second dummy source/drain is disposed at the second elevation. The second transistor is vertically aligned with the third transistor. The first dummy source/drain is vertically aligned with a source/drain of the fourth transistor. The second dummy source/drain is vertically aligned with a source/drain of the first transistor. The gate structure between the second dummy source/drain and a source/drain of the third transistor is absent. A method for manufacturing a semiconductor structure is also provided.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Inventors: POCHUN WANG, GUO-HUEI WU, HUI-ZHONG ZHUANG, CHIH-LIANG CHEN, LI-CHUN TIEN
  • Patent number: 11967596
    Abstract: An integrated circuit includes a first-voltage power rail and a second-voltage power rail in a first connection layer, and includes a first-voltage underlayer power rail and a second-voltage underlayer power rail below the first connection layer. Each of the first-voltage and second-voltage power rails extends in a second direction that is perpendicular to a first direction. Each of the first-voltage and second-voltage underlayer power rails extends in the first direction. The integrated circuit includes a first via-connector connecting the first-voltage power rail with the first-voltage underlayer power rail, and a second via-connector connecting the second-voltage power rail with the second-voltage underlayer power rail.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Guo-Huei Wu, Shih-Wei Peng, Wei-Cheng Lin, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien, Lee-Chung Lu
  • Patent number: 11948886
    Abstract: A semiconductor device includes one or more active semiconductor components, wherein a front side is defined over the semiconductor substrate and a back side is defined beneath the semiconductor substrate. A front side power rail is formed at the front side of the semiconductor device and is configured to receive a first reference power voltage. First and second back side power rails are formed on the back side of the semiconductor substrate and are configured to receive corresponding second and third reference power voltages. The first, second and third reference power voltages are different from each other.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Guo-Huei Wu, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien
  • Publication number: 20240096866
    Abstract: An integrated circuit includes first-type transistors aligned within a first-type active zone, second-type transistors aligned within a second-type active zone, a first power rail and a second power rail extending in a first direction. A first distance between the long edge of the first power rail and the first alignment boundary of the first-type active zone is different from a second distance between the long edge of the second power rail and the first alignment boundary of the second-type active zone. Each of the first distance and the second distance is along a second direction which is perpendicular to the first direction.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Inventors: Guo-Huei WU, Chih-Liang CHEN, Li-Chun TIEN
  • Patent number: 9741013
    Abstract: An object location guiding device and an operation method thereof are provided. The object location guiding device includes a processor, a controller and a guiding element array. Guiding elements of the guiding element array are disposed at different positions in a field so as to point to storage positions of different objects in the field. The processor converts the object data on an object list into storage-position information. The controller receives the storage-position information from the processor, converts the storage-position information into a first axis position code and a second axis position code, and drives the guiding element array by using the first axis position code and the second axis position code, so as to allow at least one corresponding guiding element of the guiding elements to point to a storage position of a corresponding object in the field.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: August 22, 2017
    Assignees: Industrial Technology Research Institute, Changhua Christian Hospital
    Inventors: Troy-Chi Chiu, Chin-Chung Nien, Li-Huei Chen, Su-Yu Chien, Jo-Ping Li, Cheng-Hsun Yang, Pai-Hsiang Chou
  • Publication number: 20160180285
    Abstract: An object location guiding device and an operation method thereof are provided. The object location guiding device includes a processor, a controller and a guiding element array. Guiding elements of the guiding element array are disposed at different positions in a field so as to point to storage positions of different objects in the field. The processor converts the object data on an object list into storage-position information. The controller receives the storage-position information from the processor, converts the storage-position information into a first axis position code and a second axis position code, and drives the guiding element array by using the first axis position code and the second axis position code, so as to allow at least one corresponding guiding element of the guiding elements to point to a storage position of a corresponding object in the field.
    Type: Application
    Filed: December 18, 2015
    Publication date: June 23, 2016
    Inventors: Troy-Chi Chiu, Chin-Chung Nien, Li-Huei Chen, Su-Yu Chien, Jo-Ping Li, Cheng-Hsun Yang, Pai-Hsiang Chou
  • Publication number: 20100108633
    Abstract: A cap structure includes a capping body, for covering a container mouth of a container. The capping body includes a base layer, a plurality of protruding members disposed on the base layer, and a sidewall joined to a periphery of the base layer. A liner layer having coupling structures is locked with the protruding members. A space is formed between the base layer and the liner layer.
    Type: Application
    Filed: October 30, 2008
    Publication date: May 6, 2010
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Li-Huei Chen, Shao-Wei Chung, Yu-Sung Lee, Kuo-Chang Hsu
  • Publication number: 20090310865
    Abstract: A video surveillance system gets a first image from at least a video source, and extracts its image features. It embeds annotation information with at least the image features into the first image, and converts the embedded image into a second image without changing the image format. After having compressed and decompressed the second image, the system extracts the embedded information from the decompressed embedded stream to separate the image and the annotation information, thereby obtaining completely recovered annotation information after a recovery process and an image processing. Because the image format is not changed, the operations on the second image at the rear end of the system, such as compression and decompression, are not affected.
    Type: Application
    Filed: December 25, 2008
    Publication date: December 17, 2009
    Inventors: Jenn Hwan Tarng, Jwu-Sheng Hu, Yu Lun Huang, Bor-Gaung Chang, Chie-Chung Kuo, Lih-Guong Jang, Li-Huei Chen
  • Publication number: 20090167533
    Abstract: A fractal code is provided. The fractal code includes a substrate and a frequency selective surface (FSS). The FSS includes a fractal configuration designed by an iterative procedure, and the fractal configuration is disposed on the substrate. The fractal configuration is formed by a plurality of fractal circle patterns. The radii of the fractal circle patterns decrease by a specified ratio so as to assume a self-similar property, thereby achieving a multi-spectrum property and generating an identification code in frequency domain (FD-ID code). The FD-ID code is applied with space-feed method, and thus a wireless signal is operated in a predetermined band with reflection or transmission radiations, thereby achieving the function of radio frequency identification.
    Type: Application
    Filed: April 3, 2008
    Publication date: July 2, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Li-Huei Chen, Lih-Guong Jang, Ji-Chyun Liu, Joseph C. Chang
  • Patent number: 7528712
    Abstract: A system for testing RFID devices is introduced. The system includes a carrier plate configured for carrying an RFID device, a cable configured for supporting the carrier plate, a pulley apparatus configured for transporting the carrier plate along the cable, and a controller configured for adjusting test parameters in testing the RFID device.
    Type: Grant
    Filed: February 5, 2007
    Date of Patent: May 5, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Min-Kao Hong, Hsin-Teng Lin, Shao-Wei Chung, Yu-Ying Huang, Jen-Chao Lu, Li-Huei Chen
  • Publication number: 20070279212
    Abstract: A system for testing RFID devices is introduced. The system includes a carrier plate configured for carrying an RFID device, a cable configured for supporting the carrier plate, a pulley apparatus configured for transporting the carrier plate along the cable, and a controller configured for adjusting test parameters in testing the RFID device.
    Type: Application
    Filed: February 5, 2007
    Publication date: December 6, 2007
    Inventors: Min-Kao Hong, Hsin-Teng Lin, Shao-Wei Chung, Yu-Ying Huang, Jen-Chao Lu, Li-Huei Chen
  • Patent number: 7176796
    Abstract: A sealing cap with an anti-counterfeit and identification capability comprises a cap body, an identification chip with a signal emitting device generating an identification signal, and a destructive device, characterized in that the cap body is electrically connected with the signal generating device and serves as an antenna of a relatively large area and in that the destructive device after dismounting of the cap destroys the capability to emit radiation and thus prevents said identifying chip from being dismounted and reused.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: February 13, 2007
    Assignee: Industrial Technology Research Institute
    Inventors: Li-Huei Chen, Tsung-Ju Gwo, Feng-Heh Wang, Chien-Ben Chen
  • Publication number: 20060049948
    Abstract: A sealing cap with an anti-counterfeit and identification capability comprises a cap body, an identification chip with a signal emitting device generating an identification signal, and a destructive device, characterized in that the cap body is electrically connected with the signal generating device and serves as an antenna of a relatively large area and in that the destructive device after dismounting of the cap destroys the capability to emit radiation and thus prevents said identifying chip from being dismounted and reused.
    Type: Application
    Filed: October 25, 2004
    Publication date: March 9, 2006
    Inventors: Li-Huei Chen, Tsung-Ju Gwo, Feng-Heh Wang, Chien-Ben Chen