Abstract: A behavior recognition device for recognizing behaviors of a semiconductor manufacturing apparatus includes a storage device and a control unit. The storage device is configured to store log data of the semiconductor manufacturing apparatus. The control unit is cooperatively connected to the storage device, and configured to build a transition state model based on the log data to analyze behaviors related to wafer transfer sequences and manufacturing operations of the semiconductor manufacturing apparatus.

Abstract: A behavior recognition device for recognizing behaviors of a semiconductor manufacturing apparatus includes a storage device and a control unit. The storage device is configured to store log data of the semiconductor manufacturing apparatus. The control unit is cooperatively connected to the storage device, and configured to build a transition state model based on the log data to analyze behaviors related to wafer transfer sequences and manufacturing operations of the semiconductor manufacturing apparatus.

Abstract: A behavior recognition device for recognizing behaviors of a semiconductor manufacturing apparatus includes a storage device and a control unit. The storage device is configured to store log data of the semiconductor manufacturing apparatus. The control unit is cooperatively connected to the storage device, and configured to build a transition state model based on the log data to analyze behaviors related to wafer transfer sequences and manufacturing operations of the semiconductor manufacturing apparatus.

Abstract: The present disclosure provides one embodiment of a semiconductor processing apparatus. The semiconductor processing apparatus includes a load lock designed to receive a wafer carrier; an inner wafer carrier buffer configured to hold the wafer carrier received from the load lock and to perform a nitrogen purge to the wafer carrier; and a processing module designed to perform a semiconductor process to wafers from the wafer.

Abstract: The present disclosure provides one embodiment of a semiconductor processing apparatus. The semiconductor processing apparatus includes a load lock designed to receive a wafer carrier; an inner wafer carrier buffer configured to hold the wafer carrier received from the load lock and to perform a nitrogen purge to the wafer carrier; and a processing module designed to perform a semiconductor process to wafers from the wafer.

Abstract: The present disclosure provides one embodiment of a semiconductor processing apparatus. The semiconductor processing apparatus includes a load lock designed to receive a wafer carrier; an inner wafer carrier buffer configured to hold the wafer carrier received from the load lock and to perform a nitrogen purge to the wafer carrier; and a processing module designed to perform a semiconductor process to wafers from the wafer.

Abstract: A semiconductor processing station is provided. The semiconductor processing station includes a first platform, a second platform and a vacuum tunnel, wherein the first platform has a first load lock and a first plurality of chambers, and the second platform has a second load lock and a second plurality of chambers, and the vacuum tunnel connects the first and the second load locks.

Abstract: A semiconductor processing station is provided. The semiconductor processing station includes a first platform, a second platform and a vacuum tunnel, wherein the first platform has a first load lock and a first plurality of chambers, and the second platform has a second load lock and a second plurality of chambers, and the vacuum tunnel connects the first and the second load locks.

Abstract: A semiconductor processing station is provided. The semiconductor processing station includes a first platform, a second platform and a vacuum tunnel, wherein the first platform has a first load lock and a first plurality of chambers, and the second platform has a second load lock and a second plurality of chambers, and the vacuum tunnel connects the first and the second load locks.

Abstract: A system comprising a conveyor. A semiconductor processing tool has a lifter port. The tool is positioned near the conveyor, such that the lifter port is configured to transport a Front Opening Unified Pod (FOUP) between the conveyor and the lifter port. An upstream stocker and a downstream stocker are both co-located with the conveyor and the tool. The upstream and downstream stockers each have a respective storage space for the FOUP and a respective robotic device configured to transport the FOUP between its respective storage space and the conveyor. The upstream stocker is configured to receive the FOUP from an overhead transport (OHT) and deliver the FOUP to the conveyor. The downstream stocker is configured to receive the FOUP from the conveyor and deliver the FOUP to the OHT.

Abstract: A semiconductor processing station is provided. The semiconductor processing station includes a first platform, a second platform and a vacuum tunnel, wherein the first platform has a first load lock and a first plurality of chambers, and the second platform has a second load lock and a second plurality of chambers, and the vacuum tunnel connects the first and the second load locks.

Abstract: The present disclosure provides one embodiment of a semiconductor processing apparatus. The semiconductor processing apparatus includes a load lock designed to receive a wafer carrier; an inner wafer carrier buffer configured to hold the wafer carrier received from the load lock and to perform a nitrogen purge to the wafer carrier; and a processing module designed to perform a semiconductor process to wafers from the wafer.

Abstract: The present disclosure provides a lithography apparatus. The apparatus includes an exposure module designed for exposure processing; a baking module embedded in the exposure module and designed for post exposure baking (PEB); and a control module designed to control the exposure module and the baking module.

Abstract: A system comprising a conveyor. A semiconductor processing tool has a lifter port. The tool is positioned near the conveyor, such that the lifter port is configured to transport a Front Opening Unified Pod (FOUP) between the conveyor and the lifter port. An upstream stocker and a downstream stocker are both co-located with the conveyor and the tool. The upstream and downstream stockers each have a respective storage space for the FOUP and a respective robotic device configured to transport the FOUP between its respective storage space and the conveyor. The upstream stocker is configured to receive the FOUP from an overhead transport (OHT) and deliver the FOUP to the conveyor. The downstream stocker is configured to receive the FOUP from the conveyor and deliver the FOUP to the OHT.

Abstract: The present disclosure provides a lithography apparatus. The apparatus includes an exposure module designed for exposure processing; a baking module embedded in the exposure module and designed for post exposure baking (PEB); and a control module designed to control the exposure module and the baking module.