Abstract: A memory array for computing-in-memory (CIM) is disclosed. The memory array for CIM includes a bit cell array, at least one word line and at least one bit line. The bit cell array has a plurality of bit cells, wherein each bit cell is operated at an operating voltage. The at least one word line is electrically connected to the bit cell array, wherein the at least one word line is associated with a first parameter. The at least one bit line is electrically connected to the bit cell array, wherein the bit cells extend along a specific direction, each the at least one bit line has an electrical parameter associated therewith, each the bit cell is associated with a second parameter, a first quantity of the plurality of bit cells of the bit cell array extends along the specific direction, and the memory array determines how an expansion associated with at least one of the first parameter and the second parameter is according to the specific direction.

Abstract: A method includes forming a first conductive feature over a semiconductor substrate, forming an ILD layer over the first conductive feature, patterning the ILD layer to form a trench, and forming a conductive layer over the patterned ILD layer to fill the trench. The method further includes polishing the conductive layer to form a via contact configured to interconnect the first conductive feature with a second conductive feature, where polishing the conductive layer exposes a top surface of the ILD layer, polishing the exposed top surface of the ILD layer, such that a top portion of the via contact protrudes from the exposed top surface of the ILD layer, and forming the second conductive feature over the via contact, such that the top portion of the via contact extends into the second conductive feature.

Abstract: A vehicle power management system and a power management method thereof are provided. The power management method includes: determining, by a microcontroller, whether or not a voltage of an ignition-off signal is less than a voltage threshold when the microcontroller receives the ignition-off signal; stopping a vehicle power supply from charging a backup battery, and using the vehicle power supply to charge a back-end load; activating a counter of the microcontroller; stopping the vehicle power supply from charging the back-end load, and using the backup battery to charge the back-end load when a counting time of the counter reaches a first time threshold; sending, by the microcontroller, the ignition-off signal to the back-end load when the counting time of the counter reaches a second time threshold; and stopping the backup battery from charging the back-end load when the counting time of the counter reaches a third time threshold.

Abstract: A single wafer spin cleaning apparatus with soaking, cleaning, and etching functions in accordance with the present invention includes a spin driver device, a wafer spin chuck, and a wafer support disk. The wafer spin chuck is driven by the spin driver device to spin. The wafer support disk is annular and surrounds the wafer spin chuck, can act relative to the wafer spin chuck to a wafer support position or a wafer disengagement position, and includes a soaking trough. The wafer support disk at the wafer support position can support a wafer such that the wafer is soaked in processing liquid injected in the soaking trough for implementing a high efficient cleaning or etching process.

Abstract: An ammonium fluoride gas may be used to form a protection layer for one or more interlayer dielectric layers, one or more insulating caps, and/or one or more source/drain regions of a semiconductor device during a pre-clean etch process. The protection layer can be formed through an oversupply of nitrogen trifluoride during the pre-clean etch process. The oversupply of nitrogen trifluoride causes an increased formation of ammonium fluoride, which coats the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) with a thick protection layer. The protection layer protects the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) during the pre-clean process from being etched by fluorine ions formed during the pre-clean process.

Abstract: The present disclosure is generally related to 3D imaging capable OLED displays. A light field display comprises an array of 3D light field pixels, each of which comprises an array of corrugated OLED pixels, a metasurface layer disposed adjacent to the array of 3D light field pixels, and a plurality of median layers disposed between the metasurface layer and the corrugated OLED pixels. Each of the corrugated OLED pixels comprises primary or non-primary color subpixels, and produces a different view of an image through the median layers to the metasurface to form a 3D image. The corrugated OLED pixels combined with a cavity effect reduce a divergence of emitted light to enable effective beam direction manipulation by the metasurface. The metasurface having a higher refractive index and a smaller filling factor enables the deflection and direction of the emitted light from the corrugated OLED pixels to be well controlled.

Abstract: A method of manufacturing a semiconductor device includes forming a multi-layer stack of alternating first layers of a first semiconductor material and second layers of a second semiconductor material on a semiconductor substrate, forming a first recess through the multi-layer stack, and laterally recessing sidewalls of the second layers of the multi-layer stack. The sidewalls are adjacent to the first recess. The method further includes forming inner spacers with respective seams adjacent to the recessed second layers of the multi-layer stack and performing an anneal treatment on the inner spacers to close the respective seams.

Abstract: An ammonium fluoride gas may be used to form a protection layer for one or more interlayer dielectric layers, one or more insulating caps, and/or one or more source/drain regions of a semiconductor device during a pre-clean etch process. The protection layer can be formed through an oversupply of nitrogen trifluoride during the pre-clean etch process. The oversupply of nitrogen trifluoride causes an increased formation of ammonium fluoride, which coats the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) with a thick protection layer. The protection layer protects the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) during the pre-clean process from being etched by fluorine ions formed during the pre-clean process.

Abstract: It is disclosed a photoresist cleaning composition for stripping a photoresist pattern having a film thickness of 3-150 ?m, which contains (a) quaternary ammonium hydroxide (b) a mixture of water-soluble organic solvents (c) at least one corrosion inhibitor and (d) water, and a method for treating a substrate therewith.

Abstract: Various embodiments are directed to systems and methods for provisioning a subscription service subscription to a user of a user device, the user device capable of alternatively communicating on a mobile telephone network and on a wireless data network. A request to subscribe the user to the subscription service may comprise a user device identifier and may be received from a mobile service provider system. A message to the user device may be initiated via the mobile telephone network. An access request may be received from the user, via the user device. Upon verifying that the access request was sent by a recipient of the message, the user may be provided with access to the subscription service.

Abstract: It is disclosed a photoresist cleaning composition for stripping a photoresist pattern having a film thickness of 3-150 ?m, which contains (a) quaternary ammonium hydroxide (b) a mixture of water-soluble organic solvents (c) at least one corrosion inhibitor and (d) water, and a method for treating a substrate therewith.

Abstract: Various embodiments are directed to systems and methods for provisioning a subscription service subscription to a user of a user device, the user device capable of alternatively communicating on a mobile telephone network and on a wireless data network. A request to subscribe the user to the subscription service may comprise a user device identifier and may be received from a mobile service provider system. A message to the user device may be initiated via the mobile telephone network. An access request may be received from the user, via the user device. Upon verifying that the access request was sent by a recipient of the message, the user may be provided with access to the subscription service.

Abstract: An HCG to HDL translation method, which can automatically generate VHDL codes. The method reads a hardware component graph (HCG) to find a start node and obtain a corresponding hardware component subgraph of the start node, analyzes all information of the start node to thereby add input and output components and generate a VHDL entity, determines types on all nodes of the hardware component, graph to thereby generate corresponding VHDL components and write associated information in a VHDL architecture, generates corresponding signal connections of VHDL components in accordance with edges of the hardware component graph, and outputs the VHDL entity and architecture to a file in a text form.

Abstract: A method of automatic synthesis of sequential quantum Boolean circuits for transferring a self-timed circuit into a sequential quantum Boolean circuit and synthesizing the sequential quantum Boolean circuit, which comprises the steps of: (A) transferring the self-timed circuit into a state graph having M state nodes, where M is an integer; (B) determining whether the state graph is reversible; (C) encoding the M state nodes by using a unique state encoding when step (B) decides that the state graph is reversible, and producing a unique state coding reversible state graph; (D) transferring the unique state coding reversible state graph (USCRSG) into a corresponding self-timed transformation graph; (E) performing a state decomposition on the self-timed transformation graph and producing a decomposed self-timed transformation graph; and (F) constructing a quantum Boolean circuit of the decomposed self-timed transformation graph.

Abstract: A method of automatic synthesis of sequential quantum Boolean circuits for transferring a self-timed circuit into a sequential quantum Boolean circuit and synthesizing the sequential quantum Boolean circuit, which comprises the steps of: (A) transferring the self-timed circuit into a state graph having M state nodes, where M is an integer; (B) determining whether the state graph is reversible; (C) encoding the M state nodes by using a unique state encoding when step (B) decides that the state graph is reversible, and producing a unique state coding reversible state graph; (D) transferring the unique state coding reversible state graph (USCRSG) into a corresponding self-timed transformation graph; (E) performing a state decomposition on the self-timed transformation graph and producing a decomposed self-timed transformation graph; and (F) constructing a quantum Boolean circuit of the decomposed self-timed transformation graph.

Abstract: A process of automatically translating a high level programming language into an extended activity diagram (EAD), which can translate source codes coded by the high level programming language into a corresponding activity diagram (AD) before the high level language is translated into a hardware description language (HDL). The process adds a new translation rule in a compiler and modifies the AD specification of a unified modeling language (UML) to accordingly translate the source codes into the AD and present the programming logic and executing flow of the source codes in a visualization form. In addition, the process can translate the high level programming language into a unified format for representation, and the AD can benefit simulation and requirement in a following HDL translation.

Abstract: An HCG to HDL translation method, which can automatically generate VHDL codes. The method reads a hardware component graph (HCG) to find a start node and obtain a corresponding hardware component subgraph of the start node, analyzes all information of the start node to thereby add input and output components and generate a VHDL entity, determines types on all nodes of the hardware component, graph to thereby generate corresponding VHDL components and write associated information in a VHDL architecture, generates corresponding signal connections of VHDL components in accordance with edges of the hardware component graph, and outputs the VHDL entity and architecture to a file in a text form.

Abstract: A process of automatically translating a high level programming language into a hardware description language (HDL), which can use a three-stage translation mechanism to generate the HDL codes corresponding to the functions described by the high level programming language. The first stage translates source codes coded by the high level programming language into an extended activity diagram (EAD). The second stage translates the EAD into a hardware component graph (HCG). The third stage generates the respective signal connections of HDL components according to all edges of the HCG, and outputs an HDL entity and architecture to a file in a string form, thereby completing the entire translation.