Patents by Inventor Li-Kang Wu

Li-Kang Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240087980
    Abstract: A semiconductor device includes a substrate, a dielectric layer disposed over the substrate, and an interconnect structure extending through the dielectric layer. The dielectric layer includes a low-k dielectric material which includes silicon carbonitride having a carbon content ranging from about 30 atomic % to about 45 atomic %. The semiconductor device further includes a thermal dissipation feature extending through the dielectric layer and disposed to be spaced apart from the interconnect structure.
    Type: Application
    Filed: February 17, 2023
    Publication date: March 14, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kai-Fang CHENG, Cherng-Shiaw TSAI, Cheng-Chin LEE, Yen-Ju WU, Yen-Pin HSU, Li-Ling SU, Ming-Hsien LIN, Hsiao-Kang CHANG
  • Patent number: 7179708
    Abstract: A process for fabricating non-volatile memory by tilt-angle ion implantation comprises essentially the steps of implanting sideling within a nitride dielectric layer heterogeneous elements such as, for example, Ge, Si, N2, O2, and the like, for forming traps capable of capturing more electrons within the nitride dielectric layer such that electrons can be prevented from binding together as the operation time increased; etching off both ends of the original upper and underlying oxide layers to reduce the structural destruction caused by the implantation of heterogeneous elements; and finally, depositing an oxide gate interstitial wall to eradicate electron loss and hence promote the reliability of the device.
    Type: Grant
    Filed: July 14, 2004
    Date of Patent: February 20, 2007
    Assignee: Chung Yuan Christian University
    Inventors: Erik S. Jeng, Wu-Ching Chou, Li-Kang Wu, Chien-Chen Li
  • Publication number: 20060019441
    Abstract: A process for fabricating non-volatile memory by tilt-angle ion implantation comprises essentially the steps of implanting sideling within a nitride dielectric layer heterogeneous elements such as, for example, Ge, Si, N2, O2, and the like, for forming traps capable of capturing more electrons within the nitride dielectric layer such that electrons can be prevented from binding together as the operation time increased; etching off both ends of the original upper and underlying oxide layers to reduce the structural destruction caused by the implantation of heterogeneous elements; and finally, depositing an oxide gate interstitial wall to eradicate electron loss and hence promote the reliability of the device.
    Type: Application
    Filed: July 14, 2004
    Publication date: January 26, 2006
    Applicant: Chung Yuan Christian University
    Inventors: Erik Jeng, Wu-Ching Chou, Li-Kang Wu, Chien-Chen Li