Abstract: A semiconductor device includes one or more active semiconductor components, wherein a front side is defined over the semiconductor substrate and a back side is defined beneath the semiconductor substrate. A front side power rail is formed at the front side of the semiconductor device and is configured to receive a first reference power voltage. First and second back side power rails are formed on the back side of the semiconductor substrate and are configured to receive corresponding second and third reference power voltages. The first, second and third reference power voltages are different from each other.

Abstract: An electrode controls transmittance of a blocking layer over a photodiode of a pixel sensor (e.g., a photodiode of a small pixel detector) by changing oxidation of a metal material included in the blocking layer. By using the electrode to adjust transmittance of the blocking layer, pixel sensors for different uses and/or products may be produced using a single manufacturing process. As a result, power and processing resources are conserved that otherwise would have been expended in switching manufacturing processes. Additionally, production time is decreased (e.g., by eliminating downtime that would otherwise have been used to reconfigure fabrication machines.

Abstract: Provided is a peptide and method in preventing or treating infections caused by a wide spectrum of pathogens, including bacteria and fungus in hosts such as plants and animals. Methods of preventing or treating plant diseases and infection in animals are also provided.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes multiple semiconductor nanostructures, and the semiconductor nanostructures include a first semiconductor material. The semiconductor device structure also includes multiple epitaxial structures extending from edges of the semiconductor nanostructures. The epitaxial structures include a second semiconductor material that is different than the first semiconductor material. The semiconductor device structure further includes a gate stack wrapped around the semiconductor nanostructures.

Abstract: According to at least one aspect, a controller having a mode of operation including one of an on mode and an off mode is provided including a voltage supply node, a mode of operation signal node, a powered component, a switching device coupled in series between the voltage supply node and the powered component, a power supply detector coupled to the switching circuit, the voltage supply node, and the mode of operation signal node, the power supply detector being configured to receive a mode of operation signal indicative of the mode of operation of the controller from the mode of operation signal node, determine that the controller is in the off mode based on the mode of operation signal, and control the switching device to prevent a current from passing from the voltage supply node to the powered component responsive to determining that the controller is in the off mode.

Abstract: A method for preparing an aramid fiber electrochemical capacitor includes (1) immersing aramid fiber bundles in an aqueous solution; (2) adding polyvinylpyrrolidone into a silver ammonia solution to obtain a solution C, adding an aqueous glucose solution to the solution C to obtain aramid fiber bundles coated with silver nanoparticles; (3) adding the aramid fiber bundles into an aqueous solution containing ?-(2,3-glycidoxy) propyltrimethoxysilane; (4) adding the aramid fiber bundles coated by silver nanoparticles with epoxy groups into an ethanol containing carbon nanotubes with carboxyl groups; (5) adding the aramid fiber bundles with two-layered coatings into an aqueous solution containing pyrrole; (6) heating a mixture of a polyvinyl alcohol, an acid, and water to obtain a polyvinyl alcohol gel, immersing two strands of the aramid fiber bundles, carbon nanotubes and silver nanoparticle in the polyvinyl alcohol gel, and twisting the two strands together to obtain the aramid fiber electrochemical capacitor.

Abstract: An integrated circuit includes first-type transistors aligned within a first-type active zone, second-type transistors aligned within a second-type active zone, a first power rail and a second power rail extending in a first direction. A first distance between the long edge of the first power rail and the first alignment boundary of the first-type active zone is different from a second distance between the long edge of the second power rail and the first alignment boundary of the second-type active zone. Each of the first distance and the second distance is along a second direction which is perpendicular to the first direction.

Abstract: A semiconductor device, includes a first metal layer, a second metal layer, a drain/source contact and at least one conductive via. The first metal layer has a first conductor that extends in a first direction and a second conductor that extends in the first direction, wherein the second conductor is directly adjacent to the first conductor. The second metal layer has a third conductor that extends in a second direction, wherein the second direction is transverse to the first direction. The drain/source contact extends in the second direction and is connected to the second conductor. The at least one conductive via connects the first conductor and the second conductor through the third conductor.

Abstract: A dynamic loose vehicle formation method based on real-time online navigation map, which belongs to the field of vehicle formation technologies. The method includes a driver inputs travel information of a destination and waypoints in a GIS app; the GIS app uploads the travel information to a GIS server; the driver chooses to join a recommended formation or create a formation in the GIS app; when the driver chooses the formation and joins the formation, the formation information is displayed on the GIS app interface and sent to other vehicles within the formation for information interaction; when the driver chooses to leave the formation and leaves the formation, the formation is adjusted and the GIS server updates the formation information.

Abstract: Cascode power amplifier bias circuits suitable for operating across multiple power supply domains are provided. In certain embodiments, a power amplifier system includes a cascode power amplifier and a multi-domain bias circuit that generates at least a first cascode bias voltage for the cascode power amplifier. The multi-domain bias circuit includes a coarse regulator that generates a regulated voltage based on a power supply voltage that is operable with multiple voltage levels associated with different power supply domains, a bandgap reference circuit that is powered by the regulated voltage and outputs a bandgap reference voltage, a bias voltage generator that generates multiple selectable bias voltages based on the bandgap reference voltage, and a bias voltage selector that chooses the first cascode bias voltage from amongst the selectable bias voltages.

Abstract: An integrated circuit includes a first terminal-conductor, a second terminal-conductor, and a gate-conductor between the first terminal-conductor and the second terminal-conductor. The first terminal-conductor intersects both an active-region structure and a power rail. The second terminal-conductor intersects the active-region structure without intersecting the power rail. The gate-conductor intersects the active-region structure and is adjacent to the first terminal-conductor and the second terminal-conductor. A first width of the first terminal-conductor is larger than a second width of the second terminal-conductor by a predetermined amount.

Abstract: Provided are semiconductor devices that include a first gate structure having a first end cap portion, a second gate structure having a second end cap portion coaxial with the first gate structure, a first dielectric region separating the first end cap portion and the second end cap portion, a first conductive element extending over the first gate structure, a second conductive element extending over the second gate structure, and a gate via electrically connecting the second gate structure and the second conductive element, with the first dielectric region having a first width and being positioned at least partially under the first conductive element and defines a spacing between the gate via and an end of the second end cap portion that exceeds a predetermined distance.

Abstract: The present disclosure describes a method for forming liner-free or barrier-free conductive structures. The method includes depositing an etch stop layer on a cobalt contact disposed on a substrate, depositing a dielectric on the etch stop layer, etching the dielectric and the etch stop layer to form an opening that exposes a top surface of the cobalt contact, and etching the exposed top surface of the cobalt contact to form a recess in the cobalt contact extending laterally under the etch stop layer. The method further includes depositing a ruthenium metal to substantially fill the recess and the opening, and annealing the ruthenium metal to form an oxide layer between the ruthenium metal and the dielectric.

Abstract: An integrated circuit includes a first transistor, a second transistor, a first power line, and a second power line. The first transistor has a first active region and a first gate structure, in which the first active region has a source region and a drain region on opposite sides of the first gate structure. The second transistor is below the first transistor, and has a second active region and a second gate structure, in which the second active region has a source region and a drain region on opposite sides of the second gate structure. The first power line is above the first transistor, in which the first power line is electrically connected to the source region of first active region. The second power line is below the second transistor, in which the second power line is electrically connected to the source region of second active region.

Abstract: A hydrate kinetic inhibitor, which is prepared by a polymerization of mercaptoethanol and N-vinylcaprolactam, is hydroxyl terminated poly(N-vinylcaprolactam) having a structure of formula (I) below, wherein n=10 to 1000. The inhibitor is a novel hydrate kinetic inhibitor, which has low effective concentration and high cloud point, and is effective when the degree of supercooling is relatively high.

Abstract: Disclosed is a system and a method for information distribution. The system comprises: a server for generating a group key and its corresponding key deriving parameter, wherein the server encrypts sensitive contents by using the group key to obtain encrypted information; and terminals configured to receive the encrypted information through an open channel, extract the group key, then decrypt the encrypted information by using the group key to obtain the original content. In the group forming process, each terminal encrypts its private identifier using the public key and submits the ciphertext to the server. In information distribution process, the server transmits the ciphertext of sensitive contents and the key deriving parameter to the terminals via open channel Because private information available only to respective group members is required for calculating the group key, this mechanism ensures that the sensitive content can be transmitted securely on the open channel.

Abstract: A whole-vehicle-based method for evaluating extreme pressure and antiwear properties of grease includes injecting the grease onto a key bearing pin and causing the engineering machine to operate without load is disclosed. The method includes causing the engineering machine to operate under a load of 10% to 150% rated load at least once, viewing and analyzing a wear condition of a surface of the bearing pin, and issuing a whole-vehicle-based evaluation report of extreme pressure and antiwear properties of grease. The engineering machine is caused to operate once under a load of 10% to 150% rated load for 0.5 min to 100 h.

Abstract: An integrated circuit is provided and includes a multi-bit cell having multiple bit cells disposed in multiple cell rows. The bit cells include M bit cells, M being positive integers. A first bit cell of the bit cells and a M-th bit cell of the bit cells are arranged diagonally in different cell rows in the multi-bit cell. The multi-bit cell includes first to fourth cell boundaries. The first and second boundaries extend in a first direction and the third and fourth boundaries extend in a second direction different from the first direction. The first bit cell and a second bit cell of the bit cells abut the third cell boundary, and the first bit cell and a (M/2+1)-th bit cell of the bit cells abut the first cell boundary.

Abstract: A multifunctional electric louvered awning including a ring beam frame, leg pipes for supporting the ring beam frame, and a louvered canopy, is provided. The ring beam frame includes first ring beams and second ring beams for connecting the first ring beams on both sides. Each first ring beam includes upper and lower ring beams. The upper ring beam is fixed to a clamping part of the lower ring beam. The louvered canopy is installed to the first ring beams and includes multiple louver boards arranged in sequence and a drive assembly for opening and closing the louver boards. The drive assembly includes a telescopic motor and a linkage rod. The telescopic motor is suspended from a bottom surface of the clamping part through a mounting base. The linkage rod is connected to a telescopic end of the telescopic motor to link with the louver boards.