Patents by Inventor Li Min

Li Min has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145460
    Abstract: An integrated circuit includes a T-coil circuit, a silicon-controlled rectifier (SCR), and a signal-loss prevention circuit. The T-coil circuit is coupled to an input/output (I/O) pad and an internal circuit. The SCR is coupled to the T-coil circuit and the internal circuit. The signal-loss prevention circuit is coupled to the T-coil circuit and the SCR. The signal-loss prevention circuit includes a resistor coupled to the T-coil circuit and the SCR. An electrostatic current flows through the resistor and turns on the SCR. The signal-loss prevention circuit may also include a diode circuit coupled to the T-coil circuit and the SCR. The diode circuit is configured to prevent signal loss.
    Type: Application
    Filed: January 3, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Min WU, Ming-Dou KER, Chun-Yu LIN, Li-Wei CHU
  • Publication number: 20240128324
    Abstract: A field effect transistor includes a substrate having a transistor forming region thereon; an insulating layer on the substrate; a first graphene layer on the insulating layer within the transistor forming region; an etch stop layer on the first graphene layer within the transistor forming region; a first inter-layer dielectric layer on the etch stop layer; a gate trench recessed into the first inter-layer dielectric layer and the etch stop layer within the transistor forming region; a second graphene layer on interior surface of the gate trench; a gate dielectric layer on the second graphene layer and on the first inter-layer dielectric layer; and a gate electrode on the gate dielectric layer within the gate trench.
    Type: Application
    Filed: November 21, 2022
    Publication date: April 18, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Kuo-Chih Lai, Shih-Min Chou, Nien-Ting Ho, Wei-Ming Hsiao, Li-Han Chen, Szu-Yao Yu, Chung-Yi Chiu
  • Publication number: 20240129058
    Abstract: For example, an apparatus may include a segment parser to parse scrambled data bits of a PPDU into a first plurality of data bits and a second plurality of data bits, the PPDU to be transmitted in an OFDM transmission over an aggregated bandwidth comprising a first channel in a first frequency band and a second channel in a second frequency band; a first baseband processing block to encode and modulate the first plurality of data bits according to a first OFDM MCS for transmission over the first channel in the first frequency band; and a second baseband block to encode and modulate the second plurality of data bits according to a second OFDM MCS for transmission over the second channel in the second frequency band.
    Type: Application
    Filed: October 17, 2023
    Publication date: April 18, 2024
    Applicant: INTEL CORPORATION
    Inventors: Alexander W. Min, Thomas J. Kenney, Laurent Cariou, Shahrnaz Azizi, Xiaogang Chen, Robert J. Stacey, Qinghua Li
  • Patent number: 11962878
    Abstract: An electronic device is provided, including a main body and a camera module. The camera module has a frame, a lens unit disposed in the frame, a guiding member, and a hinge. The guiding member is affixed to the main body and has a rail and a spring sheet. The hinge pivotally connects to the frame and the guiding member. When the camera module is in the retracted position, the camera module is hidden in a recess of the main body. When the camera module slides out of the recess from the retracted position along the rail into the operational position, the spring sheet is pressed by the hinge to increase the friction between the hinge and the guiding member.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: April 16, 2024
    Assignee: ACER INCORPORATED
    Inventors: Yu-Chin Huang, Cheng-Mao Chang, Li-Hua Hu, Pao-Min Huang
  • Patent number: 11953518
    Abstract: The present disclosure provides a switching matrix system and an operating method thereof for semiconductor characteristic measurement. The switching matrix system is configured to: detect an assembly of at least one switching matrix module inserted into a plurality of slots of the switching matrix system; determine a user interface according to the assembly of the at least one switching matrix module inserted into the slots, wherein the user interface includes an operable object corresponding to the assembly; and provide the user interface.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: April 9, 2024
    Assignee: STAR TECHNOLOGIES, INC.
    Inventors: Choon Leong Lou, Hsiao Hui Hsieh, Li Min Wang
  • Patent number: 11957018
    Abstract: A display device includes: a substrate having display and non-display areas; a first conductive layer including first and second sub-conductive lines; a second conductive layer including third and fourth sub-conductive lines, wherein, in the display area, the first sub-conductive line and the third sub-conductive lines cross from a top view; and a third conductive layer including third conductive lines and corresponding to the non-display area; wherein, corresponding to the non-display area, a portion of a projection of the one of the third conductive lines is overlapped with a portion of a projection of the second sub-conductive line on the substrate, and another portion of the projection of the one of the third conductive lines is overlapped with a portion of a projection of the fourth sub-conductive line on the substrate.
    Type: Grant
    Filed: May 9, 2023
    Date of Patent: April 9, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Hui-Min Huang, Li-Wei Sung, Cheng-Tso Chen, Chia-Min Yeh
  • Publication number: 20240114523
    Abstract: A method for handling a multi-cell scheduling and a user equipment is provided. In the method, downlink control information (DCI) from a first serving cell is received. A first number of multiple scheduled cells according to the DCI is determined. The DCI is configured to schedule at least one communication on the scheduled cells. Th communication is performed on at least one of the first number of the scheduled cells according to the DCI. The DCI includes at least one single DCI field, at least one separate DCI field and at least one configurable DCI field.
    Type: Application
    Filed: September 19, 2023
    Publication date: April 4, 2024
    Applicant: Acer Incorporated
    Inventors: Chien-Min Lee, Li-Chung Lo
  • Patent number: 11950282
    Abstract: A device for handling channel access procedure includes a storage device and a processing circuit coupled to the storage device and configured to execute instructions stored in the storage device. The storage device is configured for storing the instructions of receiving an indication for an uplink transmission; determining at least one parameter of the device for a listen-before-talk procedure according to a capability of the device or a signaling from a base station; and performing the uplink transmission according to the indication.
    Type: Grant
    Filed: May 30, 2022
    Date of Patent: April 2, 2024
    Assignee: ACER INCORPORATED
    Inventors: Li-Chung Lo, Chien-Min Lee
  • Patent number: 11950283
    Abstract: A device for handling channel access procedure includes a storage device and a processing circuit coupled to the storage device and configured to execute instructions stored in the storage device. The storage device is configured for storing the instructions of receiving an indication for an uplink transmission; determining at least one parameter of the device for a listen-before-talk procedure according to a capability of the device or a signaling from a base station; and performing the uplink transmission according to the indication.
    Type: Grant
    Filed: May 30, 2022
    Date of Patent: April 2, 2024
    Assignee: ACER INCORPORATED
    Inventors: Li-Chung Lo, Chien-Min Lee
  • Patent number: 11950112
    Abstract: A UE for beam failure detection is provided. The RF signal processing device of the UE assesses a first radio link quality according to a first BFD-reference signal (BFD-RS) set including at least one reference signal, communicating with a plurality of transmission/reception points (TRPs) which include at least a first TRP and a second TRP. The processor of the UE is coupled to the RF signal processing device. When the first radio link quality is below a threshold, the processor generates a first indication, wherein the first indication is a first beam failure instance (BFI) or the first BFD-RS set. The processor enables a first timer and a first counter according to the first indication.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: April 2, 2024
    Assignee: ACER INCORPORATED
    Inventors: Li-Chung Lo, Chien-Min Lee
  • Patent number: 11942362
    Abstract: Embodiments described herein relate generally to methods for forming a conductive feature in a dielectric layer in semiconductor processing and structures formed thereby. In some embodiments, a structure includes a dielectric layer over a substrate, a surface modification layer, and a conductive feature. The dielectric layer has a sidewall. The surface modification layer is along the sidewall, and the surface modification layer includes phosphorous and carbon. The conductive feature is along the surface modification layer.
    Type: Grant
    Filed: March 6, 2023
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jian-Jou Lian, Kuo-Bin Huang, Neng-Jye Yang, Li-Min Chen
  • Publication number: 20240097011
    Abstract: A method includes forming a fin structure over a substrate, wherein the fin structure comprises first semiconductor layers and second semiconductor layers alternately stacked over a substrate; forming a dummy gate structure over the fin structure; removing a portion of the fin structure uncovered by the dummy gate structure; performing a selective etching process to laterally recess the first semiconductor layers, including injecting a hydrogen-containing gas from a first gas source of a processing tool to the first semiconductor layers and the second semiconductor layers; and injecting an F2 gas from a second gas source of the processing tool to the first semiconductor layers and the second semiconductor layers; forming inner spacers on opposite end surfaces of the laterally recessed first semiconductor layers of the fin structure; and replacing the dummy gate structure and the first semiconductor layers with a metal gate structure.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 21, 2024
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY LIMITED
    Inventors: Han-Yu LIN, Fang-Wei LEE, Kai-Tak LAM, Raghunath PUTIKAM, Tzer-Min SHEN, Li-Te LIN, Pinyen LIN, Cheng-Tzu YANG, Tzu-Li LEE, Tze-Chung LIN
  • Publication number: 20240087007
    Abstract: An information processing device includes an associator, an extractor, and an outputter. The associator is configured to associate each of a series of pieces of history data related to at least any of deposits and withdrawals of a user with any of a plurality of behaviors related to an economic activity of the user. The extractor is configured to extract an inducement destination candidate according to behavioral characteristics of the user based on changes along a time series of each of the plurality of behaviors. The outputter is configured to output information indicating the extracted inducement destination candidate to a predetermined output destination.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 14, 2024
    Inventors: Shohei KITAZATO, Li YU, Satoshi TOYOKURA, Shoya MICHIMAE, Tomoaki ISHII, Kohei FUJINO, l-Min CHIEN, Yuta DATE, Yoshifumi SATAKE
  • Publication number: 20240088804
    Abstract: Provided is a motor braking device for a N-phase brushless motor. The motor braking device includes a switching circuit adapted to connect the N-phase brushless motor to a power supply, the switching circuit comprising a high side switch group and a low side switch group, each of the high side switch group and the low side switch group comprising N switching elements, and a control unit configured to control the switching circuit to brake the motor based on occurrence of a first event, the first event chosen from a group consisting of release of a trigger by a user, and occurrence of a predetermined condition as detected by a sensor. The control unit is configured to, upon occurrence of the first event, switch all the switching elements of one of the high side switch group or the low side switch group to an on-state, and simultaneously switch all the switching elements of the other one of the high side switch group and the lower side switch group to an off-state.
    Type: Application
    Filed: February 10, 2021
    Publication date: March 14, 2024
    Inventors: Bao An ZHANG, Zi Cong CHEN, Li Hua XIE, Chao WEN, Yong Min LI
  • Patent number: 11930550
    Abstract: A UE for beam failure detection is provided. The UE includes a radio frequency (RF) signal processing device. The RF signal processing device receives a first candidate-beam reference-signal (RS) list and a second candidate-beam RS list and reports a beam failure information. The first candidate-beam RS list is associated with a first beam-failure-detection RS (BFD-RS) set and the second candidate-beam RS list is associated with a second BFD-RS set. The beam failure information includes at least one of following: at least on component carrier (CC) index, at least one new candidate beam, an identity of BFD-RS set, or an CORESETPoolIndex.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: March 12, 2024
    Assignee: ACER INCORPORATED
    Inventors: Li-Chung Lo, Chien-Min Lee
  • Patent number: 11923409
    Abstract: A semiconductor device includes a source/drain feature over a semiconductor substrate, channel layers over the semiconductor substrate and connected to the source/drain feature, a gate portion between vertically adjacent channel layers, and an inner spacer between the source/drain feature and the gate portion and between adjacent channel layers. The semiconductor device further includes an air gap between the inner spacer and the source/drain feature.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Po-Yu Lin, Wei-Yang Lee, Chia-Pin Lin, Tzu-Hua Chiu, Kuan-Hao Cheng, Wei-Han Fan, Li-Li Su, Wei-Min Liu
  • Patent number: 11873355
    Abstract: Propylene-ethylene copolymer compositions and production methods are provided. The copolymer compositions can be particularly advantageous for use in hot fill packaging of foodstuffs. The propylene-ethylene copolymers can be produced using a Ziegler-Natta catalyst and an alkoxysilane electron donor. The compositions can have propylene as a primary monomer with an ethylene content ranging from 2.0 to 6.0 percent by weight with a xylene soluble content of less than 7.0 percent by weight.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: January 16, 2024
    Assignee: W.R. Grace & Co.-Conn.
    Inventors: Matthew John Fedec, Jan Willem Van Egmond, Manu Rego, John Kalevi Kaarto, Li-Min Tau
  • Publication number: 20230411296
    Abstract: A semiconductor structure includes a semiconductor substrate, a dielectric layer, a tungsten plug, a conductive plug, and a contact barrier. The dielectric layer is over a semiconductor substrate. The tungsten plug is in the dielectric layer. The conductive plug is on the tungsten plug. The contact barrier includes a sidewall barrier on a sidewall of the conductive plug and a bottom barrier between the conductive plug and the tungsten plug. A thickness of the sidewall barrier is greater than a thickness of the bottom barrier.
    Type: Application
    Filed: June 17, 2022
    Publication date: December 21, 2023
    Inventors: MENG-HSIEN LI, YING-HSIN HUNG, YU-SHAN YEH, LI-MIN CHEN, NENG-JYE YANG, KUO-BIN HUANG
  • Patent number: 11796840
    Abstract: An electrically controlled polarization rotator is disclosed. The electrically controlled polarization rotator includes two substrates and a liquid crystal layer located between the two substrates. The two substrates have a homogeneous alignment and a homeotropic alignment respectively. A distance between the two substrates is a liquid crystal thickness. A switching electric field which is adjustable is provided between the two substrates. A polarized light is incident on the substrate having the homogeneous alignment. A polarization direction of the polarized light is orthogonal or parallel to an alignment direction of the substrate having the homogeneous alignment. A birefringence of the liquid crystal layer multiplied by the liquid crystal thickness and further divided by a wavelength of the polarized light is greater than 10. The polarization direction of the polarized light is rotated corresponding to an intensity of the switching electric field in the liquid crystal layer.
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: October 24, 2023
    Assignee: NATIONAL SUN YAT-SEN UNIVERSITY
    Inventors: Tsung-Hsien Lin, Heng-Yi Tseng, Cheng-Chang Li, Duan-Yi Guo, Li-Min Chang, Kuan-Wu Lin
  • Publication number: 20230307240
    Abstract: A wet etching chemistry to selectively remove a polymer residue on an opening embedded in a low-k dielectric layer and an underlying stop layer in a process of forming an interconnect structure is provided. The wet etching chemistry includes: two type of organic solvents, wherein a concentration of the two type of organic solvents is greater than or equal to 70%; an Alkali source amine, at least comprising a tertiary amine; an inhibitor; and water. In some embodiment, the wet etching chemistry is free of a peroxide to avoid damage to the WdC hard mask.
    Type: Application
    Filed: March 25, 2022
    Publication date: September 28, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Hsien Li, Ying-Chuen Wang, Chieh-Yi Shen, Li-Min Chen, Ming-Hsi Yeh, Kuo-Bin Huang