Patents by Inventor Li Shang

Li Shang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150138554
    Abstract: A system for page detection using light attenuators is applied in a book to detect an opened page of the book. The book has N pages and each page has a page detection area in which at most M light attenuators are installed in each page detection area. A light source passes through the at most M light attenuators for attenuating intensity of the light source. M light sensing devices are installed in an area of the book that corresponds to the page detection area. The M light sensing devices are used to detect attenuated intensities of the light source. A controller is connected to the M light sensing devices for detecting the opened page based on a ratio of the intensities of the light source detected by the M light sensing devices on each page.
    Type: Application
    Filed: July 25, 2014
    Publication date: May 21, 2015
    Inventors: Li-Shang LO, Tung-Tsai LIAO
  • Patent number: 8990740
    Abstract: A reconfigurable computer architecture is disclosed. The reconfigurable computer architecture has a plurality of logic elements, a plurality of connection switching elements, and a plurality of volatile and/or non-volatile configuration random access memories (RAMs). Each of the configuration RAMs is electrically coupled to at least one of the plurality of logic elements or at least one of the connection switching elements.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: March 24, 2015
    Assignee: The Trustees of Princeton University
    Inventors: Wei Zhang, Niraj K. Jha, Li Shang
  • Publication number: 20140250253
    Abstract: Particular embodiments described herein can offer an electronic fabric for a processing system that includes a fabric adapter to couple to a first fabric associated with a first system and to couple to a second fabric associated with a second system. The fabric adapter is configured to pass bidirectional communications between the first system and the second system. The electronic fabric can further include an address translation agent configured to map a first physical address in a first address space of the first system to a second physical address in a second address space of the second system.
    Type: Application
    Filed: October 3, 2012
    Publication date: September 4, 2014
    Inventors: Sai Luo, Xin Zhou, Chunxiao Lin, Yingzhe Shen, Li Shang
  • Publication number: 20140059282
    Abstract: A hybrid nanotube, high-performance, dynamically reconfigurable architecture, NATURE, is provided, and a design optimization flow method and system, NanoMap. A run-time reconfigurable architecture is provided by associating a non-volatile universal memory to each logic element to enable cycle-by-cycle reconfiguration and logic folding, while remaining CMOS compatible. Through logic folding, significant logic density improvement and flexibility in performing area-delay tradeoffs are possible. NanoMap incorporates temporal logic folding during the logic mapping, temporal clustering and placement steps. NanoMap provides for automatic selection of a best folding level, and uses force-direct scheduling to balance resources across folding stages. Mapping can thereby target various optimization objectives and user constraints.
    Type: Application
    Filed: December 7, 2011
    Publication date: February 27, 2014
    Inventors: Wei ZHANG, Niraj K. JHA, Li SHANG
  • Publication number: 20140029500
    Abstract: According to some embodiments, a communication module 120 may be configured to transmit data packet traffic and a management module 110 may be configured to shape the data packet traffic transmitted by the communication module 120. The management module 110 may shape the data packet traffic by buffering data packets routed at different times to the communication module 120 based on at least one power management factor.
    Type: Application
    Filed: December 29, 2011
    Publication date: January 30, 2014
    Inventors: Sai Luo, Shanshan Zheng, Li Shang, Xin Zhou, Chunxiao Lin, Sun Chan
  • Publication number: 20130135008
    Abstract: A reconfigurable computer architecture is disclosed. The reconfigurable computer architecture has a plurality of logic elements, a plurality of connection switching elements, and a plurality of volatile and/or non-volatile configuration random access memories (RAMs). Each of the configuration RAMs is electrically coupled to at least one of the plurality of logic elements or at least one of the connection switching elements.
    Type: Application
    Filed: December 1, 2010
    Publication date: May 30, 2013
    Applicants: TRUSTEES OF PRINCETON UNIVERSITY, QUEEN'S UNIVERSITY AT KINGSTON
    Inventors: Wei Zhang, Niraj K. Jha, Li Shang
  • Patent number: 8117436
    Abstract: A hybrid nanotube, high-performance, dynamically reconfigurable architecture, NATURE, is provided, and a design optimization flow method and system, NanoMap. A run-time reconfigurable architecture is provided by associating a non-volatile universal memory to each logic element to enable cycle-by-cycle reconfiguration and logic folding, while remaining CMOS compatible. Through logic folding, significant logic density improvement and flexibility in performing area-delay tradeoffs are possible. NanoMap incorporates temporal logic folding during the logic mapping, temporal clustering and placement steps. NanoMap provides for automatic selection of a best folding level, and uses force-direct scheduling to balance resources across folding stages. Mapping can thereby target various optimization objectives and user constraints.
    Type: Grant
    Filed: April 19, 2007
    Date of Patent: February 14, 2012
    Assignees: Queen's University at Kingston, Trustees of Princeton University
    Inventors: Wei Zhang, Niraj K. Jha, Li Shang
  • Publication number: 20090219051
    Abstract: A hybrid nanotube, high-performance, dynamically reconfigurable architecture, NATURE, is provided, and a design optimization flow method and system, NanoMap. A run-time reconfigurable architecture is provided by associating a non-volatile universal memory to each logic element to enable cycle-by-cycle reconfiguration and logic folding, while remaining CMOS compatible. Through logic folding, significant logic density improvement and flexibility in performing area-delay tradeoffs are possible. NanoMap incorporates temporal logic folding during the logic mapping, temporal clustering and placement steps. NanoMap provides for automatic selection of a best folding level, and uses force-direct scheduling to balance resources across folding stages. Mapping can thereby target various optimization objectives and user constraints.
    Type: Application
    Filed: April 19, 2007
    Publication date: September 3, 2009
    Inventors: Wei Zhang, Niraj K. Jha, Li Shang
  • Publication number: 20070244676
    Abstract: This invention relates to a comprehensive method of analyzing dynamic and steady-state properties of a system. Steady state (static), short time scale dynamic, and long time scale dynamic properties of the system are described by a plurality of elements. The method unifies spatial, temporal, and frequency-domain techniques to minimize analysis time while maintaining accuracy during both steady state, short time scale, and long time scale analysis. The method dynamically adapts spatial and temporal modeling granularity to achieve high efficiency while maintaining accuracy. The method is applicable to properties of a system that diffuse through space and/or time, such as temperature, concentration, density, etc., in fields such as biomedical modeling, molecular dynamics, meteorology, astrophysics, financial analysis, engineering, etc., and in particular, to thermal analysis of electronic devices such as integrated circuits.
    Type: Application
    Filed: March 5, 2007
    Publication date: October 18, 2007
    Inventors: Li Shang, Yonghong Yang, Robert Dick
  • Publication number: 20040016049
    Abstract: A bacteria removing cleaner comprises a water-stopping control unit and a nozzle means. A plurality of conduits are used for transferring water. The water-stopping control unit has a rotary switch, a main body and a water-stop control valve for controlling the water inlet and water stopping. The main body is spaced into a water outlet space and a water inlet space. A water-stop control valve is installed at the interface of the water inlet space and the water outlet space. The top end of the water-stop control valve is connected to the rotary switch. The water-stop control valve is utilized to control water flow. By rotating a rotary switch, a washing time can be controlled effectively. Moreover, the bacteria removing cleaner is capable of being assembled to a stool rapidly and quickly. Thereby, the lifetime is prolonged.
    Type: Application
    Filed: July 25, 2002
    Publication date: January 29, 2004
    Inventors: Tien-Yu Wu, Sung-Seng Lu, Li-Shang Wu
  • Patent number: 6681411
    Abstract: A bacteria removing cleaner comprises a water-stopping control unit and a nozzle means. A plurality of conduits are used for transferring water. The water-stopping control unit has a rotary switch, a main body and a water-stop control valve for controlling the water inlet and water stopping. The main body is spaced into a water outlet space and a water inlet space. A water-stop control valve is installed at the interface of the water inlet space and the water outlet space. The top end of the water-stop control valve is connected to the rotary switch. The water-stop control valve is utilized to control water flow. By rotating a rotary switch, a washing time can be controlled effectively. Moreover, the bacteria removing cleaner is capable of being assembled to a stool rapidly and quickly. Thereby, the lifetime is prolonged.
    Type: Grant
    Filed: July 25, 2002
    Date of Patent: January 27, 2004
    Inventors: Tien-Yu Wu, Sung-Seng Lu, Li-Shang Wu