Abstract: A semiconductor device and a method of forming the same are provided. The method includes forming a bottom electrode layer over a substrate. A magnetic tunnel junction (MTJ) layers are formed over the bottom electrode layer. A top electrode layer is formed over the MTJ layers. The top electrode layer is patterned. After patterning the top electrode layer, one or more process cycles are performed on the MTJ layers and the bottom electrode layer. A patterned top electrode layer, patterned MTJ layers and a patterned bottom electrode layer form MTJ structures. Each of the one or more process cycles includes performing an etching process on the MTJ layers and the bottom electrode layer for a first duration and performing a magnetic treatment on the MTJ layers and the bottom electrode layer for a second duration.

Abstract: A method includes bonding a composite die on a redistribution structure. The composite die comprises a device die including a semiconductor substrate, a through-semiconductor via penetrating through the semiconductor substrate, a metal via at a surface of the device die, and a sacrificial carrier attached to the device die. The composite die is encapsulated in an encapsulant. A planarization process is performed on the composite die and the encapsulant, and the sacrificial carrier is removed to reveal the metal via. A conductive feature is formed to electrically couple to the metal via.

Abstract: A method includes removing a dummy gate to leave a trench between gate spacers, forming a gate dielectric extending into the trench, depositing a metal layer over the gate dielectric, with the metal layer including a portion extending into the trench, depositing a filling region into the trench, with the metal layer have a first and a second vertical portion on opposite sides of the filling region, etching back the metal layer, with the filling region at least recessed less than the metal layer, and remaining parts of the portion of the metal layer forming a gate electrode, depositing a dielectric material into the trench, and performing a planarization to remove excess portions of the dielectric material. A portion of the dielectric material in the trench forms at least a portion of a dielectric hard mask over the gate electrode.

Abstract: The present invention discloses a signal processing device, an air pressure sensor assembly and an electronics apparatus. The signal processing device for a sensing signal comprises: an input unit, which is configured to receive the sensing signal; and a processing unit, which is configured to attenuate a higher frequency component of the sensing signal so that the value of the higher frequency component when the sensing signal is stable is lower than that when the sensing signal is changing. According to an embodiment of this invention, the present invention can reduce the noise in a sensing signal from an air pressure sensor during a stable state.

Abstract: The present invention discloses a signal processing device, an air pressure sensor assembly and an electronics apparatus. The signal processing device for a sensing signal comprises: an input unit, which is configured to receive the sensing signal; and a processing unit, which is configured to attenuate a higher frequency component of the sensing signal so that the value of the higher frequency component when the sensing signal is stable is lower than that when the sensing signal is changing. According to an embodiment of this invention, the present invention can reduce the noise in a sensing signal from an air pressure sensor during a stable state.

Abstract: A galvanically-isolated device and a method for fabricating the same are provided. The galvanically-isolated device includes a lead frame including a first die-attach pad, a first lead and a second lead. A substrate is disposed on the first die-attach pad. A high-voltage semiconductor capacitor formed on the substrate includes an interconnection structure. The interconnection structure includes an inter-metal dielectric layer structure. A first plate, a second plate and a third plate are formed on the inter-metal dielectric layer structure, separated from each other. The first plate, the second plate and a first portion of the inter-metal dielectric layer structure are composed of a first capacitor. The first plate, the third plate and a second portion of the inter-metal dielectric layer structure are composed of a second capacitor connected in series with the first capacitor.

Abstract: Methods of multi-protocol system and integrated circuit for multi-protocol communication on a single wire are provided. The method, adopted by a multi- protocol system containing a master device, a peripheral device and a slave device coupled together by a single wire, wherein the slave device is capable of operating in first and second operation modes. The method includes: receiving, by the slave device, an analog signal from the peripheral device on a single wire in the first operation mode; transmitting, by the master device, a digital signal containing a preamble pattern on the single wire; and after detecting the preamble pattern, switching, by the slave device, from the first to the second operation mode which includes suspending receiving the analog signal on the single wire, and communicating with the master device in serial digital data via the single wire.

Abstract: A galvanically-isolated device and a method for fabricating the same are provided. The galvanically-isolated device includes a lead frame including a first die-attach pad, a first lead and a second lead. A substrate is disposed on the first die-attach pad. A high-voltage semiconductor capacitor formed on the substrate includes an interconnection structure. The interconnection structure includes an inter-metal dielectric layer structure. A first plate, a second plate and a third plate are formed on the inter-metal dielectric layer structure, separated from each other. The first plate, the second plate and a first portion of the inter-metal dielectric layer structure are composed of a first capacitor. The first plate, the third plate and a second portion of the inter-metal dielectric layer structure are composed of a second capacitor connected in series with the first capacitor.

Abstract: The invention provides a switching system. The switching system comprises an H bridge, a current router, and a control circuit. The H bridge comprises a first switch and a second switch coupled to a first output node and a third switch and a fourth switch coupled to a second output node, wherein a load is coupled between the first output node and the second output node. The current router comprises a first shunt switch and a second shunt switch coupled between the first output node and the second output node. The control circuit generates a first control signal to control the first switch and the fourth switch, generates a second control signal to control the second switch and the third switch, generates a third control signal to control the first shunt switch, and generates a fourth control signal to control the second shunt switch.

Abstract: The invention further provides a switching amplifier system. In one embodiment, the switching amplifier system comprises a noise shaper, a corrector, and a pulse width logic. The noise shaper receives a first signal, performs a noise shaping process to process the first signal according to a feedback signal to generate a second signal sliced into a plurality of frames. The corrector adds a plurality of correction pulses respectively to the frames of the second signal to obtain a third signal in such a way that the correction pulse added to the second signal in a target frame selected from the frames has a polarity inverse to that of an original waveform of the second signal in the target frame. The pulse width logic then converts the third signal to a pulse width modulation (PWM) signal.

Abstract: The invention provides a switching system. The switching system comprises an H bridge, a current router, and a control circuit. The H bridge comprises a first switch and a second switch coupled to a first output node and a third switch and a fourth switch coupled to a second output node, wherein a load is coupled between the first output node and the second output node. The current router comprises a first shunt switch and a second shunt switch coupled between the first output node and the second output node. The control circuit generates a first control signal to control the first switch and the fourth switch, generates a second control signal to control the second switch and the third switch, generates a third control signal to control the first shunt switch, and generates a fourth control signal to control the second shunt switch.

Abstract: The invention provides an audio interface device and method utilizing a single audio jack connector for plugging into a three-wire analog microphone or a three-wire digital microphone, thereby reducing dimensions and production costs thereof and an electronic system using the same. The audio interface comprises an audio jack connector, having first to third contacts electronically connected with the three-wire microphone plugged thereinto; and an audio processing device, detecting a type of the three-wire microphone plugged into the audio jack connector, outputting a clock signal to the three-wire microphone and receiving a digital audio signal from the three-wire microphone when the type is digital; or receiving analog audio signals from the three-wire microphone when the type is analog.

Abstract: The invention further provides a switching amplifier system. In one embodiment, the switching amplifier system comprises a noise shaper, a corrector, and a pulse width logic. The noise shaper receives a first signal, performs a noise shaping process to process the first signal according to a feedback signal to generate a second signal sliced into a plurality of frames. The corrector adds a plurality of correction pulses respectively to the frames of the second signal to obtain a third signal in such a way that the correction pulse added to the second signal in a target frame selected from the frames has a polarity inverse to that of an original waveform of the second signal in the target frame. The pulse width logic then converts the third signal to a pulse width modulation (PWM) signal.

Abstract: The invention provides a switching system. The switching system comprises an H bridge, a current router, and a control circuit. The H bridge comprises a first switch and a second switch coupled to a first output node and a third switch and a fourth switch coupled to a second output node, wherein a load is coupled between the first output node and the second output node. The current router comprises a first shunt switch and a second shunt switch coupled between the first output node and the second output node. The control circuit generates a first control signal to control the first switch and the fourth switch, generates a second control signal to control the second switch and the third switch, generates a third control signal to control the first shunt switch, and generates a fourth control signal to control the second shunt switch.

Abstract: The invention provides a microphone circuit. In one embodiment, the microphone circuit comprises a transducer, a biasing resistor, a pre-amplifier, and a switch circuit. The transducer is coupled between a ground and a first node for converting a sound into a voltage signal output to the first node. The biasing resistor is coupled between the ground and the first node. The pre-amplifier is biased with a biasing voltage and coupled between the first node and a second node, and amplifies the voltage signal to obtain an output signal at the second node. The switch circuit is coupled between the first node and the ground, couples the first node to the ground when the microphone circuit is reset, and decouples the first node from the ground after a voltage status of the microphone circuit is stable, thus clamping a voltage of the first node to the ground to prevent generation of a popping noise when the microphone circuit is reset.

Abstract: The invention provides a method for analog-to-digital conversion in a microphone circuit. First, a first gain is determined. A first analog signal is then amplified according to the first gain to obtain a second analog signal. The second analog signal is then converted from analog to digital to obtain a first digital signal. A second gain is then determined according to the first gain so that a product of the first gain and the second gain is kept constant. The first digital signal is then amplified according to the second gain to obtain a second digital signal.

Abstract: The invention provides an audio interface device and method utilizing a single audio jack connector for plugging into a three-wire analog microphone or a three-wire digital microphone, thereby reducing dimensions and production costs thereof and an electronic system using the same. The audio interface comprises an audio jack connector, having first to third contacts electronically connected with the three-wire microphone plugged thereinto; and an audio processing device, detecting a type of the three-wire microphone plugged into the audio jack connector, outputting a clock signal to the three-wire microphone and receiving a digital audio signal from the three-wire microphone when the type is digital; or receiving analog audio signals from the three-wire microphone when the type is analog.

Abstract: The invention provides an integrated circuit attached to a microphone. In one embodiment, the integrated circuit comprises a buffer, a gain stage, an analog-to-digital converter (ADC), and a memory module. The buffer buffers a first signal generated by the microphone, and outputs the first signal as a second signal. The gain stage amplifies the second signal according to an adjustable gain to obtain a third signal. The analog-to-digital converter converts the third signal from analog to digital to obtain a fourth signal as an output of the integrated circuit. The memory module stores the adjustable gain and outputs the adjustable gain to the gain stage for controlling amplification of the gain stage.

Abstract: An audio processing circuit is provided, receiving a microphone signal from a microphone to output a differential signal. A preamplifier receives the microphone signal to output a first preamplified voltage and a second preamplified voltage. A gain stage receives the first preamplified voltage and the second preamplified voltage to output the differential signal comprising a first differential output and a second differential output. In the preamplifier, a first operational amplifier is provided. A first voltage controlled current source is controlled by the output end of the first operational amplifier to provide a first current. A first transistor has a gate coupled to a ground voltage supply, a source coupled to the first voltage controlled current source for receiving the first current, and a drain coupled to a voltage ground. Likewise, a second voltage controlled current source and a second transistor are presented symmetrically to render the differential output.

Abstract: The invention provides an integrated circuit. The integrated circuit receives a first signal from a microphone via a first node. In one embodiment, the integrated circuit comprises a biasing circuit and a buffering circuit. The biasing circuit is coupled between the first node and a second node, drives the microphone with a first voltage source, and filters the first signal to generate a second signal at the second node. In one embodiment, the biasing circuit comprises a first resistor, a first capacitor, and a load element. The first resistor is coupled between the first voltage source and the first node. The first capacitor is coupled between the first node and the second node. The load element is coupled between the second node and a second voltage source. The buffering circuit is coupled between the second node and a third node and buffers the second signal to generate a third signal at the third node.