Abstract: The present invention provides a wireless communication method of a multi-link device. The wireless communication method includes the steps of: establishing multiple links with an access point, wherein the multiple links have a current link mode; determining performance of a current link mode and at least one candidate link mode, wherein frequency band(s) corresponding to the current link mode and the at least one candidate link mode are not the same; and if the performance of one of the at least one candidate link mode is greater than the performance of the current link mode, switching the link mode of the multiple links, without reconnecting to the access point, so that the one of the at least one candidate link mode serves as the current link mode to communicate with the access point.

Abstract: A method for performing beamforming sounding feedback in a system-parameter-aware manner and associated apparatus are provided. The method applicable to a wireless transceiver device within a wireless communications system may include: checking a plurality of system parameters of the wireless communications system to generate a plurality of checking results of the plurality of system parameters, respectively, wherein any checking result among the plurality of checking results indicates a current value of a corresponding system parameter among the plurality of system parameters; modifying a first beamforming feedback matrix according to the plurality of checking results to generate a second beamforming feedback matrix; and sending beamforming sounding feedback information carrying the second beamforming feedback matrix to another device within the wireless communications system, for further processing of the other device.

Abstract: A method is for updating an original firmware file of an I/O module which communicates with multiple host-end devices and stores the original firmware file. The method includes: receiving a current-received data packet from one host-end device; when it is determined that the current-received data packet is a first data packet constituting an update file, and that the original firmware file is not undergoing an update process, setting a status flag to indicate that the original firmware file is undergoing an update process, storing the current-received data packet; and repeating the previous steps when it is determined that the current-received data packet is not a last one data packet constituting the update file.

Abstract: A method is for updating an original firmware file of an I/O module which communicates with multiple host-end devices and stores the original firmware file. The method includes: receiving a current-received data packet from one host-end device; when it is determined that the current-received data packet is a first data packet constituting an update file, and that the original firmware file is not undergoing an update process, setting a status flag to indicate that the original firmware file is undergoing an update process, storing the current-received data packet; and repeating the previous steps when it is determined that the current-received data packet is not a last one data packet constituting the update file.

Abstract: A rack system includes a first ROM, a first RAM, a first control unit configured to access the first ROM, a second ROM, a second RAM, and a second control unit electrically connected to the first control unit via a communication channel and configured to access the second ROM. The first control unit is operable, in response to receipt of a request signal from the second control unit for accessing data from the first ROM, to read the data from the first ROM and to transmit the data to the second control unit via the communication channel. The second control unit is operable, upon receipt of the data from the first control unit, to store the data in the second RAM and to access the data from the second RAM.

Abstract: The embodiments described herein provide for a packaging configuration that provides leads or connections for a packaging substrate from opposing surfaces of a package. Through silicon vias (TSV) are provided in order to accommodate additional input/output (I/O) pins that smaller dies are supporting. Various combinations of packages are enabled through the embodiments provided.

Abstract: Provided is an interleaved or wavy spatial arrangement of the micro-vias providing the electrical pathways for the power and ground leads are described. The spatial arrangement increases the coupling pairs between power and ground vias or leads. This spatial arrangement is maintained even as the micro-vias transition across a plane from a direction of travel. Thus, the charge from the decoupling capacitor is able to more efficiently be delivered as the inductances are minimized through this design.

Abstract: A bump array structure for an integrated circuit is presented. An array of metal alloy bumps is disposed on a surface of the integrated circuit. The array of metal alloy bumps is configured to receive input from a multi-layer substrate package and transmit output to the multi-layer substrate package. The array defines a first portion of metal alloy bumps around the periphery of the surface of the integrated circuit configured to provide power and ground signals for the integrated circuit. The array further defines a second portion of metal alloy bumps providing power and ground for the integrated circuit, located between opposing sides of the periphery of the integrated circuit. Metal alloy bumps not contained in either the first or the second portion of the array are configured for input and output signals between the integrated circuit and the multi-level substrate package.

Abstract: Provided is an interleaved or wavy spatial arrangement of the micro-vias providing the electrical pathways for the power and ground leads are described. The spatial arrangement increases the coupling pairs between power and ground vias or leads. This spatial arrangement is maintained even as the micro-vias transition across a plane from a direction of travel. Thus, the charge from the decoupling capacitor is able to more efficiently be delivered as the inductances are minimized through this design.

Abstract: Provided is an interleaved or wavy spatial arrangement of the micro-vias providing the electrical pathways for the power and ground leads are described. The spatial arrangement increases the coupling pairs between power and ground vias or leads. This spatial arrangement is maintained even as the micro-vias transition across a plane from a direction of travel. Thus, the charge from the decoupling capacitor is able to more efficiently be delivered as the inductances are minimized through this design.

Abstract: The embodiments described herein provide for a packaging configuration that provides leads or connections for a packaging substrate from opposing surfaces of a package. Through silicon vias (TSV) are provided in order to accommodate additional input/output (I/O) pins that smaller dies are supporting. Various combinations of packages are enabled through the embodiments provided.

Abstract: The embodiments described herein provide for a packaging configuration that provides leads or connections for a packaging substrate from opposing surfaces of a package. Through silicon vias (TSV) are provided in order to accommodate additional input/output (I/O) pins that smaller dies are supporting. Various combinations of packages are enabled through the embodiments provided.

Abstract: A bump array structure for an integrated circuit is presented. An array of metal alloy bumps is disposed on a surface of the integrated circuit. The array of metal alloy bumps is configured to receive input from a multi-layer substrate package and transmit output to the multi-layer substrate package. The array defines a first portion of metal alloy bumps around the periphery of the surface of the integrated circuit configured to provide power and ground signals for the integrated circuit. The array further defines a second portion of metal alloy bumps providing power and ground for the integrated circuit, located between opposing sides of the periphery of the integrated circuit.

Abstract: An auto-looper for a telecommunications network. The auto-looper detects the existence of continuity in a network path between at least two nodes of the network by activating at least one switch connecting the at least two nodes upon receipt of at least one addressable code to produce a loop-up state or a loop-down state.