Abstract: A field effect transistor includes a substrate having a transistor forming region thereon; an insulating layer on the substrate; a first graphene layer on the insulating layer within the transistor forming region; an etch stop layer on the first graphene layer within the transistor forming region; a first inter-layer dielectric layer on the etch stop layer; a gate trench recessed into the first inter-layer dielectric layer and the etch stop layer within the transistor forming region; a second graphene layer on interior surface of the gate trench; a gate dielectric layer on the second graphene layer and on the first inter-layer dielectric layer; and a gate electrode on the gate dielectric layer within the gate trench.

Abstract: A device dynamically collects runtime data while the device is continuously executing an application to identify the cause of a performance bottleneck. The device hardware first collects data of high-level performance events that indicate alternative causes for the performance bottleneck. Based on real-time analysis of the data, a first performance event is identified among the high-level performance events for causing the performance bottleneck. The device hardware is then re-configured to collect additional data of lower-level performance events that are under the first performance event and indicate additional alternative causes more specific than the alternative causes. The collecting, identifying, and re-configuring are performed while the device is continuously executing the application.

Abstract: A device dynamically collects runtime data while the device is continuously executing an application to identify the cause of a performance bottleneck. The device hardware first collects data of high-level performance events that indicate alternative causes for the performance bottleneck. Based on real-time analysis of the data, a first performance event is identified among the high-level performance events for causing the performance bottleneck. The device hardware is then re-configured to collect additional data of lower-level performance events that are under the first performance event and indicate additional alternative causes more specific than the alternative causes. The collecting, identifying, and re-configuring are performed while the device is continuously executing the application.

Abstract: The invention provides a packet error detecting method for a serial link. When a start framing symbol of a packet appears at the serial link, the start framing symbol is ignore if a predetermined error condition is satisfied.

Abstract: The invention provides a packet error detecting method for a serial link. When a start framing symbol of a packet appears at the serial link, the start framing symbol is ignore if a predetermined error condition is satisfied.

Abstract: The invention provides a packet error detecting method for a PCI express bus link. When a start framing symbol of a packet appears at the PCI express bus link, the start framing symbol is ignore if a predetermined error condition is satisfied.

Abstract: The invention provides a packet error detecting method for a PCI express bus link. When a start framing symbol of a packet appears at the PCI express bus link, the start framing symbol is ignore if a predetermined error condition is satisfied.