Abstract: A control circuit for controlling a stackable multiphase power converter includes: a synchronization terminal; a synchronization signal connected to the synchronization terminals of a plurality of the control circuits in parallel, wherein the synchronization signal includes a plurality of pulses to be successively counted as a count number; and a reset signal, configured to reset and initiate the count number; wherein the control circuit further comprises a phase-sequence number, wherein the control circuit enables a corresponding power stage circuit to generate a phase of the output power when the count number reaches the phase-sequence number.

Abstract: A scalable multi-phase switching converter includes: converter modules, each including: a loop control unit, which generates a basic trigger pulse according to a feedback signal in master operation mode; and a switching control unit, which determines an operation mode and a corresponding phase serial order according to a setting signal received by a setting pin in a setting mode, and generates a multi-phase trigger pulse signal at a trigger pin according to the basic trigger pulse in master operation mode. The switching control unit receives the multi-phase trigger pulse signal at the trigger pin in slave operation mode. The switching control unit generates an ON-trigger pulse according to the multi-phase trigger pulse signal and the corresponding phase serial order. An ON-period determination unit generates a conduction control pulse according to the ON-trigger pulse to control a corresponding inductor. The trigger pins of the converter modules are coupled to each other.

Abstract: A control circuit for controlling a stackable multiphase power converter includes: a synchronization terminal; a synchronization signal connected to the synchronization terminals of a plurality of the control circuits in parallel, wherein the synchronization signal includes a plurality of pulses to be successively counted as a count number; and a reset signal, configured to reset and initiate the count number; wherein the control circuit further comprises a phase-sequence number, wherein the control circuit enables a corresponding power stage circuit to generate a phase of the output power when the count number reaches the phase-sequence number.

Abstract: A scalable multi-phase switching converter includes: converter modules, each including: a loop control unit, which generates a basic trigger pulse according to a feedback signal in master operation mode; and a switching control unit, which determines an operation mode and a corresponding phase serial order according to a setting signal received by a setting pin in a setting mode, and generates a multi-phase trigger pulse signal at a trigger pin according to the basic trigger pulse in master operation mode. The switching control unit receives the multi-phase trigger pulse signal at the trigger pin in slave operation mode. The switching control unit generates an ON-trigger pulse according to the multi-phase trigger pulse signal and the corresponding phase serial order. An ON-period determination unit generates a conduction control pulse according to the ON-trigger pulse to control a corresponding inductor. The trigger pins of the converter modules are coupled to each other.

Abstract: An over-voltage protection circuit is applied to a switching voltage converting circuit. The switching voltage converting circuit manipulates an upper bridge power switch in the circuit, so as to convert an input voltage into an output voltage by an inductor. A channel of the upper bridge power switch and the inductor are coupled to a phase end. The over-voltage protection circuit includes: a comparator, coupled to the switching voltage converting circuit, wherein when a voltage of the phase end is higher than a voltage limiting threshold, an output end of the comparator outputs a first voltage level; and a pulse width detection unit, coupled to the output end of the comparator, wherein when the output end of the comparator remains the first voltage level for a time period longer than a protection period, the pulse width detection unit outputs an over-voltage protection activation signal.

Abstract: A voltage converting controller is applied to a switching voltage converting circuit, in which the voltage converting controller periodically operates a high-side power switch and a low-side power switch in the switching voltage converting circuit with a high-side control signal and a low-side control signal, respectively, so as to convert an input voltage into an output voltage via an inductor. Defining an ideal duty cycle as the rating value of the output voltage divided by the value of the input voltage, when the ideal duty cycle is less than one threshold duty cycle, then the period of the high-side control signal is a constant; and when the ideal duty cycle is greater than the threshold duty cycle, the period of the high-side control signal and the period of the ideal duty cycle are positively correlated.

Abstract: An over-voltage protection circuit is applied to a switching voltage converting circuit. The switching voltage converting circuit manipulates an upper bridge power switch in the circuit, so as to convert an input voltage into an output voltage by an inductor. A channel of the upper bridge power switch and the inductor are coupled to a phase end. The over-voltage protection circuit includes: a comparator, coupled to the switching voltage converting circuit, wherein when a voltage of the phase end is higher than a voltage limiting threshold, an output end of the comparator outputs a first voltage level; and a pulse width detection unit, coupled to the output end of the comparator, wherein when the output end of the comparator remains the first voltage level for a time period longer than a protection period, the pulse width detection unit outputs an over-voltage protection activation signal.

Abstract: A control circuit of a switching regulator includes a control pin for coupling with an external resistor; a resistor detecting circuit for detecting a resistance of the external resistor; a current generating module for generating a corresponding control current according to a detection result of the resistor detecting circuit; an oscillating circuit for generating a clock signal; and a mode-switching circuit. When the mode-switching circuit configures the oscillating circuit to operate in a resistor-controlled mode, the oscillating circuit generates the clock signal according to the control current so that the clock signal has a frequency corresponding to the resistance of the external resistor. When the mode-switching circuit configures the oscillating circuit to operate in a signal-controlled mode, the oscillating circuit generates the clock signal according to an external synchronous signal coupled with the control pin so that the clock signal is synchronized with the external synchronous signal.

Abstract: The present invention discloses a fuse circuit for final test trimming of an integrated circuit (IC) chip. The fuse circuit includes at least one electrical fuse, at least one control switch corresponding to the electrical fuse, and a resistant device. The electrical fuse is connected with the control switch in series between a predetermined pin and a grounding pin. The control switch receives a control signal to determine whether a predetermined current flows through the corresponding electrical fuse and breaks the electrical fuse. The resistant device is coupled between a bulk terminal and a source terminal to increase a resistance of a parasitic channel, such that an electrostatic discharge (ESD) protection is enhanced, and errors of final test trimming of an IC chip are avoided.

Abstract: The present invention discloses a constant on-time switching regulator, a control method therefor, and an on-time calculation circuit for calculating an on-time period of a constant on-time switching regulator. The on-time calculation circuit calculates on-time according to practical conditions. It includes: a driver gate receiving a gate signal of a power switch in a switching regulator, the driver gate operating between high and low levels of a first reference voltage and ground; a low pass filter receiving an output from the driver gate and generating a second reference voltage, a ratio between the second reference voltage and the first reference voltage being substantially the same as a duty ratio of the gate signal; and an on-time generator comparing the second reference voltage with a ramp signal to determine an on-time of the power switch.

Abstract: A control circuit of a switching regulator includes a control pin for coupling with an external resistor; a resistor detecting circuit for detecting a resistance of the external resistor; a current generating module for generating a corresponding control current according to a detection result of the resistor detecting circuit; an oscillating circuit for generating a clock signal; and a mode-switching circuit. When the mode-switching circuit configures the oscillating circuit to operate in a resistor-controlled mode, the oscillating circuit generates the clock signal according to the control current so that the clock signal has a frequency corresponding to the resistance of the external resistor. When the mode-switching circuit configures the oscillating circuit to operate in a signal-controlled mode, the oscillating circuit generates the clock signal according to an external synchronous signal coupled with the control pin so that the clock signal is synchronized with the external synchronous signal.

Abstract: The present invention discloses a constant on-time switching regulator, a control method therefor, and an on-time calculation circuit for calculating an on-time period of a constant on-time switching regulator. The on-time calculation circuit calculates on-time according to practical conditions. It includes: a driver gate receiving a gate signal of a power switch in a switching regulator, the driver gate operating between high and low levels of a first reference voltage and ground; a low pass filter receiving an output from the driver gate and generating a second reference voltage, a ratio between the second reference voltage and the first reference voltage being substantially the same as a duty ratio of the gate signal; and an on-time generator comparing the second reference voltage with a ramp signal to determine an on-time of the power switch.

Abstract: The present invention discloses a fuse circuit for final test trimming of an integrated circuit (IC) chip. The fuse circuit includes at least one electrical fuse, at least one control switch corresponding to the electrical fuse, and a resistant device. The electrical fuse is connected with the control switch in series between a predetermined pin and a grounding pin. The control switch receives a control signal to determine whether a predetermined current flows through the corresponding electrical fuse and breaks the electrical fuse. The resistant device is coupled between a bulk terminal and a source terminal to increase a resistance of a parasitic channel, such that an electrostatic discharge (ESD) protection is enhanced, and errors of final test trimming of an IC chip are avoided.

Abstract: The present invention discloses a constant on-time switching regulator, a control method therefor, and an on-time calculation circuit for calculating an on-time period of a constant on-time switching regulator. The on-time calculation circuit calculates on-time according to practical conditions. It includes: a driver gate receiving a gate signal of a power switch in a switching regulator, the driver gate operating between high and low levels of a first reference voltage and ground; a low pass filter receiving an output from the driver gate and generating a second reference voltage, a ratio between the second reference voltage and the first reference voltage being substantially the same as a duty ratio of the gate signal; and an on-time generator comparing the second reference voltage with a ramp signal to determine an on-time of the power switch.

Abstract: The present invention discloses a constant on-time switching regulator, a control method therefor, and an on-time calculation circuit for calculating an on-time period of a constant on-time switching regulator. The on-time calculation circuit calculates on-time according to practical conditions. It includes: a driver gate receiving a gate signal of a power switch in a switching regulator, the driver gate operating between high and low levels of a first reference voltage and ground; a low pass filter receiving an output from the driver gate and generating a second reference voltage, a ratio between the second reference voltage and the first reference voltage being substantially the same as a duty ratio of the gate signal; and an on-time generator comparing the second reference voltage with a ramp signal to determine an on-time of the power switch.

Abstract: The present invention discloses a dual-mode buck switching regulator, comprising: a first power transistor having an end coupled to an input voltage and another end coupled to a common node; an inductor having an end coupled to the common node and another end coupled to the input voltage; a second power transistor having an end coupled to ground; a diode having an end coupled to ground; and a control circuit generating a first and a second switch control signals for controlling operations of the first and the second power transistors according to a feedback signal, and generating a mode selection signal according a mode control signal to select a synchronous or an asynchronous mode, wherein the second power transistor has another end which is coupled to the common node in the synchronous mode, and the diode has another end which is coupled to the common node in the asynchronous mode, and in the asynchronous mode: the another end of the second power transistor is not coupled to the common mode, or the second p

Abstract: A level shift circuit includes an input stage and an output stage coupled to each other by two nodes. The input stage changes the voltages on the nodes according to an input signal, and the output stage determines an output signal according to the voltages on the two nodes. In a transition state, the input stage provides a large current to charge or discharge the first node or the second node so as to quickly change the voltage thereon. In a steady state, the input stage lowers the current so as to reduce power consumption.

Abstract: A level shift circuit includes an input stage and an output stage coupled to each other by two nodes. The input stage changes the voltages on the nodes according to an input signal, and the output stage determines an output signal according to the voltages on the two nodes. In a transition state, the input stage provides a large current to charge or discharge the first node or the second node so as to quickly change the voltage thereon. In a steady state, the input stage lowers the current so as to reduce power consumption.