Abstract: A CMP machine dresser. The dresser includes a substrate, a first conductive layer and a second conductive layer respectively disposed and isolated in the substrate, a plurality of diamonds mounted in the first conductive layer and the second conductive layer, and a bonding layer disposed on the substrate for attaching the diamonds. The first conductive layer and the second conductive layer detect the conductive materials penetrating the original position of the diamonds when any of the diamonds dislodges, so as to determine the diamonds dislodgement.

Abstract: A CMP machine dresser. The dresser includes a substrate, a first conductive layer and a second conductive layer respectively disposed and isolated in the substrate, a plurality of diamonds mounted in the first conductive layer and the second conductive layer, and a bonding layer disposed on the substrate for attaching the diamonds. The first conductive layer and the second conductive layer detect the conductive materials penetrating the original position of the diamonds when any of the diamonds dislodges, so as to determine the diamonds dislodgement.

Abstract: A CMP machine dresser. The dresser includes a substrate, a first conductive layer and a second conductive layer respectively disposed and isolated in the substrate, a plurality of diamonds mounted in the first conductive layer and the second conductive layer, and a bonding layer disposed on the substrate for attaching the diamonds. The first conductive layer and the second conductive layer detect the conductive materials penetrating the original position of the diamonds when any of the diamonds dislodges, so as to determine the diamonds dislodgement.

Abstract: A method of forming a uniform collar oxide layer over an upper portion of a sidewall of a trench extending into a semiconductor substrate is disclosed. A silicon oxide layer and a mask layer are conformally formed on a single-crystal silicon substrate having a trench. A photoresist layer is formed on the mask layer, a part of the photoresist layer is then removed to make the top surface of the photoresist layer lower than the top surface of the single-crystal silicon substrate with a distance. After the mask layer and the silicon oxide layer, which are not covered by the remaining photoresist layer, are removed, the remaining photoresist layer is removed. Then, an ion implantation process is proceeded to make the oxidation rates in the (110) and (100) orientations existing in the sidewall of the trench equal to each other. After the sidewall of the trench is treated, a local oxidation is executed to form a uniform collar oxide layer.

Abstract: A method of fabricating a capacitor of a DRAM cell. First, an insulating layer is formed on the semiconductor substrate at the top portion of the trench. Afterward, a seed layer on the ringed insulating layer and the semiconductor substrate at the bottom portion of the trench. A photoresist is coated in the trench at the bottom portion. Next, the seed layer is partially removed to expose the ringed insulating layer while the photoresist is used as the shield. The photoresist is then removed to expose the remaining seed layer at the bottom portion. A hemispherical silicon grain layer is deposited from the remaining seed layer on the semiconductor substrate. Ions are doped the hemispherical silicon grain layer and the semiconductor substrate so as to create a doped area to serve as the lower electrode of the capacitor.

Abstract: A method of forming a uniform collar oxide layer over an upper portion of a sidewall of a trench extending into a semiconductor substrate is disclosed. A silicon oxide layer and a mask layer are conformally formed on a single-crystal silicon substrate having a trench. A photoresist layer is formed on the mask layer, a part of the photoresist layer is then removed to make the top surface of the photoresist layer lower than the top surface of the single-crystal silicon substrate with a distance. After the mask layer and the silicon oxide layer, which are not covered by the remaining photoresist layer, are removed, the remaining photoresist layer is removed. Then, an ion implantation process is proceeded to make the oxidation rates in the (110) and (100) orientations existing in the sidewall of the tench equal to each other. After the sidewall of the tench is treated, a local oxidation is executed to form a uniform collar oxide layer.

Abstract: A method of fabricating a trench capacitor of a memory cell is disclosed. A pad layer is formed on the substrate, then, a deep trench is formed. A first insulating layer and a second insulating layer are formed in the deep trench. A photoresist layer fills the deep trench. The portion of the photoresist layer, which is in the upper portion of the deep trench, is removed. After removing the portion of the second insulating layer and the first insulating layer above the residual photoresist layer, the residual photoresist layer is then removed. A collar oxide layer is formed on the surface of the upper portion of the deep trench. The residual first insulating layer and the residual second insulating layer are removed. A seeding layer is formed on the lower portion of the deep trench. A hemispherical silicon grain layer is formed on the seeding layer. The predetermined ions implant into the hemispherical silicon grain layer.

Abstract: A method for manufacturing trench isolation, comprising firstly, defining a trench isolation over the substrate by photolithography and etching technique. Beside, by way of a spacer fabricating process to form a spacer around each of the two sides of the trench isolation. Therefore, a sharp corner in the crossing region between the trench isolation and an active area adjacent thereto in the substrate is smoothed, and the process window for a sequential gate polysilicon etching is improved, as well as the opportunity to leave polysilicon residue in the corner is eliminated. The short circuit between polysilicon gates is also avoided.

Abstract: A method for cleaning a semiconductor wafer which includes the sequential steps of cleaning the wafer in a dilute hydrofluoric acid bath, cleaning the wafer in a first ozone bath, cleaning the wafer in a dilute hydrofluoric acid/hydrogen peroxide/hydrogen chloride bath, followed by cleaning the wafer in a second ozone bath. The method uses the dilute hydrofluoric acid/hydrogen peroxide/hydrochloric acid bath instead of the conventional DHF bath and RCA2 bath. Hence, the amount of chemicals consumed and the number of baths used by the cleaning station are lowered. In addition, ozone is passed into an overflow loath so that the highly reactive ozone can be utilized to clean the wafer without putting additional load on the cleaning station. Therefore, the cleaning operation can be carried out in a smaller cleaning station using somewhat lower temperature and lower concentration chemical solutions. The efficiency is as high as a multi-bath station, but chemicals are not wasted.

Abstract: A method of water mark inspection. By forming a pattern on a test wafer, the water mark formed thereon directly reflects the features of a wafer product to be evaluated. The water mark is formed by simulating fabrication process conditions of forming the wafer product of which the performance is to be evaluated. Thus, after scanning the water mark by a defect inspection machine, the performance of the wafer product is evaluated.