Abstract: The present disclosure proposes a pixel circuit, a control method thereof and a display panel. The pixel circuit includes a first light-emitting element, a pixel drive circuit connected with the first light-emitting element, a repair branch circuit connected with a node between the pixel drive circuit and the first light-emitting element, wherein the repair branch circuit includes a switch circuit and a second light-emitting element connected in series, and the switch circuit controls a connection or disconnection of the second light-emitting element with the pixel drive circuit; a control circuit connected with a control terminal of the switch circuit, a first data terminal and a first control terminal, the control circuit is configured to write a signal of the first data terminal to the control terminal of the switch circuit under a control of the first control terminal to control on or off of the switch circuit.

Abstract: A pixel drive circuit includes a data write sub-circuit, an input and read sub-circuit, a drive sub-circuit, and a first output control sub-circuit. The data write sub-circuit is configured to transmit data signals input from a first data voltage terminal at different times to a first node. The input and read sub-circuit is configured to: transmit a signal of a signal transmission terminal to a second node in a write period, and transmit an electrical signal of the second node to the signal transmission terminal in a threshold voltage read period. The drive sub-circuit is configured to output a drive signal. The first output control sub-circuit is configured to: be coupled to an element to be driven, and transmit the drive signal output by the drive sub-circuit to the element to be driven.

Abstract: An alignment mark includes a first alignment marker located on a first surface of a substrate and a second alignment marker located on a second surface of the substrate. The second alignment marker is arranged to be matched with the first alignment marker, and capable of representing a process variation between the second alignment marker and the first alignment marker.

Abstract: The present application provides a pixel circuit, a pixel driving method and a display device. The pixel circuit is to be coupled to a to-be-driven element. The pixel circuit includes a first energy storage circuit, a driving circuit, a light-emitting control circuit, a data writing circuit, and a compensation control circuit. The compensation control circuit is configured to, under control of a third control signal, control conduction between the first node and the first terminal of the driving circuit, and control conduction between the second node and the second terminal of the driving circuit.

Abstract: A display panel and a driving method thereof, and a display device are disclosed. The display panel includes a plurality of sub-pixel unit groups arranged in an array, the array includes a plurality of rows and a plurality of columns, each of the sub-pixel unit groups includes N sub-pixel units disposed along a column direction and a pixel driving circuit, each of the N sub-pixel units includes a light-emitting circuit, the pixel driving circuit is electrically connected to the light-emitting circuits of the N sub-pixel units, and the pixel driving circuit is configured to provide light-emitting driving currents to the light-emitting circuits of the N sub-pixel units.

Abstract: A pixel circuit includes a driving circuit, a first control circuit and a second control circuit. The driving circuit is configured to receive a data signal in response to a scan signal, and generate, in response to a first enable signal, a driving signal according to a first voltage and the data signal. The first control circuit is configured to: receive a first input signal in response to a first control signal, and transmit a third input signal in response to the first input signal; and receive a second input signal in response to a second control signal, and transmit a second enable signal in response to the second input signal. The second control circuit is configured to transmit the driving signal to an element to be driven in response to one of the third input signal and the second enable signal.

Abstract: Disclosed herein are compounds of formula (I) which are inhibitors of an IDO enzyme: (I). Also disclosed herein are uses of the compounds in the potential treatment or prevention of an IDO-associated disease or disorder. Also disclosed herein are compositions comprising these compounds. Further disclosed herein are uses of the compositions in the potential treatment or prevention of an IDO-associated disease or disorder.

Abstract: A shift register (SR) includes a voltage control circuit (110) and a bias compensation circuit (120). The voltage control circuit (110) is configured to control a voltage at a first node (Output) to be a first voltage or a second voltage. The bias compensation circuit (120) is configured to: when the voltage at the first node (Output) is the first voltage, transmit a first signal received by a first signal terminal (VDD-A) to a first signal output terminal (EM1), and transmit a second signal received by a second signal terminal (VDD-B) to a second signal output terminal (EM2); and in response to the voltage at the first node (Output) being the second voltage, transmit a signal received by a first voltage terminal (LVGL1) to the first signal output terminal (EM1) and the second signal output terminal (EM2).

Abstract: A display panel, a method of driving a display panel, and a display device are provided. The display panel includes a plurality of sub-pixel units arranged in an array, a plurality of compensation driving circuits and a plurality of light emitting control lines; sub-pixel units in each row are divided into a plurality of compensation light emitting groups, the plurality of compensation light emitting groups include a plurality of first compensation light emitting groups, the first compensation light emitting groups each include N sub-pixel units that are adjacent, and light emitting circuits of the N sub-pixel units that are adjacent are connected to one same compensation driving circuit; the light emitting circuits of the N sub-pixel units that are adjacent of each of the first compensation light emitting groups are respectively connected to N light emitting control lines that are different.

Abstract: The present disclosure relates to the field of display technologies, and in particular, to a shift register circuit and a display device. The shift register circuit may include a plurality of GOAs for outputting scan signals to a plurality of pixel driving circuits and a plurality of EOAs for outputting control signals to the plurality of pixel driving circuits, where the GOAs and the EOAs are alternately arranged in a straight line.

Abstract: The present disclosure provides a pixel driving circuit and a display panel. The pixel driving circuit includes: a data writing sub-circuit configured to transmit a data voltage signal to a first terminal of a driving sub-circuit in response to a first scanning signal; a threshold compensation sub-circuit configured to compensate for a threshold voltage of the driving sub-circuit in response to a second scanning signal; a storage sub-circuit configured to store the data voltage signal; the driving sub-circuit configured to provide a driving current for a light emitting device to be driven according to voltages of a first terminal and a control terminal of the driving sub-circuit; and a voltage maintaining sub-circuit configured to maintain the voltage of the control terminal of the driving sub-circuit when the voltage of the first terminal of the driving sub-circuit jumps.

Abstract: A drive back plate is provided. The drive back plate includes a base substrate, and a drive circuit and a bonding structure disposed on the base substrate. The drive circuit includes a target drive structure, and a film layer disposed on at least one side of the target drive structure and adjacent to the target drive structure in the drive back plate is an inorganic insulating layer. The bonding structure is disposed on the same layer as the target drive structure, and the material of the bonding structure is the same as the material of the target drive structure.

Abstract: A pixel circuit includes a current control sub-circuit, a combined light emitting sub-circuit, and a first light emitting element to an Nth light emitting element, N being a natural number greater than 1. The current control sub-circuit is configured to receive a display data signal and a light emitting control signal, control whether to generate a driving current according to the light emitting control signal, and control a current intensity of the generated driving current according to the display data signal. The combined light emitting sub-circuit is configured to receive the driving current and a first light emitting data signal to an Nth light emitting data signal and drive one or more of the first light emitting element to the Nth light emitting element to emit light according to the first light emitting data signal to the Nth light emitting data signal.

Abstract: A pixel circuit and a method of driving the same, and a display device. The pixel circuit includes a plurality of pixel compensation circuits, and each pixel compensation circuit can be connected to M light-emitting units located in the same column. Each light-emitting control signal terminal of the M light-emitting control signal terminals included in each light-emitting control signal terminal group may be connected to a pixel compensation circuit group (i.e., K rows of pixels compensation circuits).

Abstract: The present application provides a pixel circuit, a pixel driving method and a display device. The pixel circuit is to be coupled to a to-be-driven element. The pixel circuit includes a first energy storage circuit, a driving circuit, a light-emitting control circuit, a data writing circuit, and a compensation control circuit. The compensation control circuit is configured to, under control of a third control signal, control conduction between the first node and the first terminal of the driving circuit, and control conduction between the second node and the second terminal of the driving circuit.

Abstract: Disclosed is an array substrate including multiple first selection circuits with each including at least two first selection transistors and at least two first anticreeping transistors. Each first selection transistor is connected with one first anticreeping transistor in series. When the first selection transistor is turned on by a first turn-on signal from a first control signal terminal, the first anticreeping transistor is turned on by a second turn-on signal from a second control signal terminal. When the first selection transistor is turned off by a first turn-off signal from the first control signal terminal, the first anticreeping transistor is turned off to make the first selection transistors and the data signal terminal disconnected, by a second turn-off signal from the second control signal terminal. A voltage of the first turn-off signal is greater than a voltage of the second turn-off signal.

Abstract: An array substrate includes pixel group(s) and pixel circuit group(s), each pixel group includes pixels, and each pixel includes sub-pixel(s). At least two pixel groups are arranged in a row direction; in a column direction, a length of a pixel group is greater than a length of a pixel circuit group electrically connected thereto; and orthographic projections of a sub-pixel and a pixel circuit group electrically connected to a pixel group to which the sub-pixel belongs on a plane does not overlap. Or, the at least two pixel groups are arranged in the column direction; in the row direction, a length of a pixel group is greater than a length of a pixel circuit group electrically connected thereto; and orthographic projections of a sub-pixel and a pixel circuit group electrically connected to a pixel group to which the sub-pixel belongs on another plane does not overlap.

Abstract: A pixel circuit includes an input circuit and a time control circuit. The input circuit includes a driving transistor, and the input circuit is configured to write a data signal into a gate of the driving transistor in response to a first gate signal, so that the driving transistor outputs a driving signal for driving an element to be driven to emit light according to a gate voltage and a source voltage thereof. The time control circuit is coupled to the input circuit and the element to be driven, and is configured to control the input circuit to transmit the driving signal to the element to be driven for a first duration, and control the input circuit to transmit the driving signal to the element to be driven for a second duration. The second duration is shorter than the first duration, and includes a plurality of phases spaced apart.

Abstract: A display panel is provided. The display panel includes a base substrate and a plurality of display units disposed on the base substrate. The display unit includes a signal line, a light-emitting device and a drive unit. The light-emitting device is disposed in a flexible display region of the base substrate, the drive unit is disposed in a pixel circuit region of the base substrate, and the signal line is connected with the light-emitting device and the drive unit.

Abstract: The present disclosure discloses a light-emitting substrate, a method for forming the light-emitting substrate and a display device. The light-emitting substrate includes: a base substrate; a first signal line located at one side of the base substrate; an insulation layer located at one side of the first signal line away from the base substrate; an electrode layer located at one side of the insulation layer away from the base substrate and including a first electrode terminal, a second electrode terminal and a second signal line, where the first electrode terminal is electrically connected to the first signal line via a first through hole penetrating the insulation layer; and at least one light-emitting element bound and connected to the first electrode terminal and the second electrode terminal.