Patents by Inventor Li-Ya TSENG

Li-Ya TSENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Interface of integrated circuit die and method for arranging interface thereof
    Patent number: 11742295
    Abstract: An interface of integrated circuit (IC) die includes a plurality of the contact elements formed as a contact element pattern corresponding to a parallel bus. The contact elements are arranged in an array of rows and columns and divided into a transmitting group and a receiving group. The contact elements of the transmitting group have a first contact element sequence and the contact elements of the receiving group have a second contact element sequence, the first contact element sequence is identical to the second contact element sequence. The contact elements with the first contact element sequence and the second contact element sequence are matched when the contact element pattern is geometrically rotated by 180° with respect to a row direction and a column direction.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: August 29, 2023
    Assignees: Global Unichip Corporation, Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Hao Wang, Ting-Chin Cho, Igor Elkanovich, Amnon Parnass, Chia-Hsiang Chang, Tsai-Ming Yang, Yen-Chung T. Chen, Ting-Hsu Chien, Yuan-Hung Lin, Chao-Ching Huang, Li-Ya Tseng, Pei Yu, Jia-Liang Chen, Yen-Wei Chen, Chung-Kai Wang, Chun-Hsu Chen, Yu-Ju Chang, Li-Hua Lin, Zanyu Yang
  • INTERFACE OF INTEGRATED CIRCUIT DIE AND METHOD FOR ARRANGING INTERFACE THEREOF
    Publication number: 20220208684
    Abstract: An interface of integrated circuit (IC) die includes a plurality of the contact elements formed as a contact element pattern corresponding to a parallel bus. The contact elements are arranged in an array of rows and columns and divided into a transmitting group and a receiving group. The contact elements of the transmitting group have a first contact element sequence and the contact elements of the receiving group have a second contact element sequence, the first contact element sequence is identical to the second contact element sequence. The contact elements with the first contact element sequence and the second contact element sequence are matched when the contact element pattern is geometrically rotated by 180° with respect to a row direction and a column direction.
    Type: Application
    Filed: December 28, 2020
    Publication date: June 30, 2022
    Applicants: Global Unichip Corporation, Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Hao Wang, Ting-Chin Cho, Igor Elkanovich, Amnon Parnass, Chia-Hsiang Chang, Tsai-Ming Yang, Yen-Chung T. Chen, Ting-Hsu Chien, Yuan-Hung Lin, Chao-Ching Huang, Li-Ya Tseng, Pei Yu, Jia-Liang Chen, Yen-Wei Chen, Chung-Kai Wang, Chun-Hsu Chen, Yu-Ju Chang, Li-Hua Lin, Zanyu Yang
  • Semiconductor structure of work unit module
    Patent number: 11037886
    Abstract: A semiconductor structure of a work unit module includes an encircling noise-resistance structure and a P-type substrate being defined with a chip region and a surrounding region surrounding the chip region. The surrounding area includes two first strip regions and two second strip regions. Each of the first strip regions is located between the second strip regions, and each of the second strip regions is located between the first strip regions. The encircling noise-resistance structure is located on the surrounding area, and includes first arrangement units and second arrangement units. The first arrangement unit is arranged in one of the first strip regions in a single row. The second arrangement unit is arranged in one of the second strip regions in a single row, and the long axis direction of the second arrangement unit is different from the long axis direction of the first arrangement unit.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: June 15, 2021
    Assignees: GLOBAL UNICHIP CORPORATION, TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Li-Ya Tseng, Wei-Cheng Yu, Bo-Yan Li, Wen-Tai Wang
  • SEMICONDUCTOR STRUCTURE OF WORK UNIT MODULE
    Publication number: 20210050304
    Abstract: A semiconductor structure of a work unit module includes an encircling noise-resistance structure and a P-type substrate being defined with a chip region and a surrounding region surrounding the chip region. The surrounding area includes two first strip regions and two second strip regions. Each of the first strip regions is located between the second strip regions, and each of the second strip regions is located between the first strip regions. The encircling noise-resistance structure is located on the surrounding area, and includes first arrangement units and second arrangement units. The first arrangement unit is arranged in one of the first strip regions in a single row. The second arrangement unit is arranged in one of the second strip regions in a single row, and the long axis direction of the second arrangement unit is different from the long axis direction of the first arrangement unit.
    Type: Application
    Filed: December 6, 2019
    Publication date: February 18, 2021
    Inventors: Li-Ya TSENG, Wei-Cheng YU, Bo-Yan LI, Wen-Tai WANG