Patents by Inventor Liam Anderson
Liam Anderson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240266464Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer and a second sub-layer, wherein the first or the second sub-layer is adjacent to the light emitting layer. The electrical contact can be coupled to the second sub-layer. The first and second sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first sub-layer. The first sub-layer, the second sub-layer, and the light emitting layer can each comprise a superlattice.Type: ApplicationFiled: April 3, 2024Publication date: August 8, 2024Applicant: Silanna UV Technologies Pte LtdInventors: Johnny Cai Tang, Chun To Lee, Guilherme Tosi, Christopher Flynn, Liam Anderson, Timothy William Bray, Petar Atanackovic
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Patent number: 11978824Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, wherein the third sub-layer is adjacent to the light emitting layer. The electrical contact can be coupled to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. The first, second and third sub-layers, the light emitting layer, and the second layer can each comprise a superlattice.Type: GrantFiled: March 21, 2023Date of Patent: May 7, 2024Assignee: Silanna UV Technologies Pte LtdInventors: Johnny Cai Tang, Chun To Lee, Guilherme Tosi, Christopher Flynn, Liam Anderson, Timothy William Bray, Petar Atanackovic
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Publication number: 20230381041Abstract: Various implementations include a device for moving a person on a support apparatus. The device includes a base, an expandable volume, a slider, and a sheet. The base has a support apparatus coupler for coupling the device to a portion of a support apparatus. The expandable volume is coupled to the base and is actuatable from a first position to a second position. A first portion of the sheet is stationary with respect to the base. The sheet extends from adjacent a first side of the expandable volume, over the expandable volume, around a portion of the slider adjacent a second side of the expandable volume, over the expandable volume, and over the first side of the expandable volume. Actuation of the expandable volume from the first position to the second position increases a length of the sheet from the second side to the first side of the expandable volume.Type: ApplicationFiled: May 31, 2023Publication date: November 30, 2023Inventors: Samuel T. Fox, Liam Anderson, Nicholas Ponder
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Publication number: 20230223491Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, wherein the third sub-layer is adjacent to the light emitting layer. The electrical contact can be coupled to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. The first, second and third sub-layers, the light emitting layer, and the second layer can each comprise a superlattice.Type: ApplicationFiled: March 21, 2023Publication date: July 13, 2023Applicant: Silanna UV Technologies Pte LtdInventors: Johnny Cai Tang, Chun To Lee, Guilherme Tosi, Christopher Flynn, Liam Anderson, Timothy William Bray, Petar Atanackovic
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Patent number: 11626535Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, wherein the third sub-layer is adjacent to the light emitting layer. The electrical contact can be coupled to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. The first, second and third sub-layers, and the light emitting layer can each comprise a superlattice. The second layer can comprise a chirped superlattice.Type: GrantFiled: April 14, 2022Date of Patent: April 11, 2023Assignee: Silanna UV Technologies Pte LtdInventors: Johnny Cai Tang, Chun To Lee, Guilherme Tosi, Christopher Flynn, Liam Anderson, Timothy William Bray, Petar Atanackovic
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Publication number: 20220238754Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, wherein the third sub-layer is adjacent to the light emitting layer. The electrical contact can be coupled to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. The first, second and third sub-layers, and the light emitting layer can each comprise a superlattice. The second layer can comprise a chirped superlattice.Type: ApplicationFiled: April 14, 2022Publication date: July 28, 2022Applicant: Silanna UV Technologies Pte LtdInventors: Johnny Cai Tang, Chun To Lee, Guilherme Tosi, Christopher Flynn, Liam Anderson, Timothy William Bray, Petar Atanackovic
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Patent number: 11322647Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, where the third sub-layer is adjacent to the light emitting layer. The electrical contact to the first set of doped layers can be made to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. In some cases, the second sub-layer can absorb more light emitted from the light emitting layer than the first or third sub-layers.Type: GrantFiled: May 1, 2020Date of Patent: May 3, 2022Assignee: Silanna UV Technologies Pte LtdInventors: Johnny Cai Tang, Chun To Lee, Guilherme Tosi, Christopher Flynn, Liam Anderson, Timothy William Bray, Petar Atanackovic
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Publication number: 20210343896Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, where the third sub-layer is adjacent to the light emitting layer. The electrical contact to the first set of doped layers can be made to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. In some cases, the second sub-layer can absorb more light emitted from the light emitting layer than the first or third sub-layers.Type: ApplicationFiled: May 1, 2020Publication date: November 4, 2021Applicant: Silanna UV Technologies Pte LtdInventors: Johnny Cai Tang, Chun To Lee, Guilherme Tosi, Christopher Flynn, Liam Anderson, Timothy William Bray
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Patent number: 10516076Abstract: A dislocation filter for a semiconductor device has a buffer layer comprising a short-period superlattice (SPSL) layer. The SPSL layer has first sub-layers of a first material that alternate with second sub-layers of a second material, the first material and the second material being group III-N binary materials that are different from each other. Each of the first sub-layers and each of the second sub-layers has a sub-layer thickness less than or equal to 12 monolayers. The buffer layer also includes a third layer of a third material, the third material being a group III-N material. The SPSL forms a sandwich structure with the third layer. The buffer layer bends dislocations away from a growth direction of the buffer layer.Type: GrantFiled: February 1, 2018Date of Patent: December 24, 2019Assignee: Silanna UV Technologies Pte LtdInventors: Liam Anderson, William Lee, William Schaff, Johnny Cai Tang
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Publication number: 20190237616Abstract: A dislocation filter for a semiconductor device has a buffer layer comprising a short-period superlattice (SPSL) layer. The SPSL layer has first sub-layers of a first material that alternate with second sub-layers of a second material, the first material and the second material being group III-N binary materials that are different from each other. Each of the first sub-layers and each of the second sub-layers has a sub-layer thickness less than or equal to 12 monolayers. The buffer layer also includes a third layer of a third material, the third material being a group III-N material. The SPSL forms a sandwich structure with the third layer. The buffer layer bends dislocations away from a growth direction of the buffer layer.Type: ApplicationFiled: February 1, 2018Publication date: August 1, 2019Applicant: Silanna UV Technologies Pte LtdInventors: Liam Anderson, William Lee, William Schaff, Johnny Cai Tang