Abstract: An output stage interface circuit for interfacing with a data bus, comprising first and second rails for receiving respectively a high voltage and a low voltage from a power supply; a data output terminal; a first main switch element coupled between said terminal and the first rail and comprising a first main MOS device having a gate and an independently configurable back gate, and responsive to a first data control signal applied to the gate pulling the voltage on the data output terminal toward the first rail voltage; and a first control circuit responsive to the voltage on said terminal being pulled from a first state across a first voltage reference to a second state for coupling said back gate to said terminal and permitting coupling of the gate of said MOS device to said terminal, the first main MOS device presenting a high impedance on the terminal when its voltage is pulled to the second state.

Abstract: An output stage interface circuit (1) comprises a main bipolar transistor (Q1) coupling a data output terminal (5) to a first rail (2) to which the positive of the power supply voltage (VDD) is applied, and a substrate diffusion isolated main NMOS transistor (MN1) coupling the data output terminal (5) to a second rail (3) which is held at ground. Control signals from a data control circuit (6) selectively operate the main bipolar transistor (Q1) and the main MOS transistor (MN1) for determining the logic high and low states of the data output terminal (5) during data output.