Abstract: A dual-chip integrated circuit package and a method for manufacturing such a dual-chip integrated circuit package are proposed, which can help prevent the occurrence of cracking and delamination in the chips and the occurrence of voids in the encapsulant during the manufacture process. The dual-chip integrated circuit package is constructed on a leadframe having a plurality of first leads and a plurality of second leads and at least a pair of support members between the first and second leads. Further, the dual-chip integrated circuit package includes at least one support member attached to the front side of the first integrated circuit chip for providing a support to the bonding pads on the second integrated circuit chip; the support member being not smaller in dimension than the area where the bonding pads on the second integrated circuit chip are located.

Abstract: A dual-chip integrated circuit package with unaligned chip arrangement and a method of manufacturing such a dual-chip integrated circuit package are provided. The dual-chip integrated circuit package includes a leadframe having a first set of leads and a second set of leads. The dual-chip integrated circuit package is used to pack two integrated circuit chips in an unaligned chip arrangement, in which the first integrated circuit chip is mounted to one side of the inner part of the first set of leads, and the second integrated circuit chip is mounted to the other side of the same in such a manner as to allow the bonding pads on the second integrated circuit chip to be positioned in the spacing formed between the two sets of leads. This unaligned chip arrangement can help facilitate the wire-bonding process for the bonding pads on the second integrated circuit chip.

Abstract: A dual-chip integrated circuit package and a method for manufacturing such a dual-chip integrated circuit package are proposed, which can help prevent the occurrence of cracking and delamination in the chips and the occurrence of voids in the encapsulant during the manufacture process. The dual-chip integrated circuit package is constructed on a leadframe having a plurality of first leads and a plurality of second leads and at least a pair of support members between the first and second leads. Further, the dual-chip integrated circuit package includes at least one support member attached to the front side of the first integrated circuit chip for providing a support to the bonding pads on the second integrated circuit chip; the support member being not smaller in dimension than the area where the bonding pads on the second integrated circuit chip are located.

Abstract: A dual-chip integrated circuit package and a method for manufacturing such a dual-chip integrated circuit package are proposed, which can help prevent the occurrence of cracking and delamination in the chips and the occurrence of voids in the encapsulant during the manufacture process. The dual-chip integrated circuit package is constructed on a leadframe having a plurality of first leads and a plurality of second leads and at least a pair of support members between the first and second leads. Further, the dual-chip integrated circuit package includes at least one support member attached to the front side of the first integrated circuit chip for providing a support to the bonding pads on the second integrated circuit chip; the support member being not smaller in dimension than the area where the bonding pads on the second integrated circuit chip are located.

Abstract: A dual-chip integrated circuit package with unaligned chip arrangement and a method of manufacturing such a dual-chip integrated circuit package are provided. The dual-chip integrated circuit package includes a leadframe having a first set of leads and a second set of leads. The dual-chip integrated circuit package is used to pack two integrated circuit chips in an unaligned chip arrangement, in which the first integrated circuit chip is mounted to one side of the inner part of the first set of leads, and the second integrated circuit chip is mounted to the other side of the same in such a manner as to allow the bonding pads on the second integrated circuit chip to be positioned in the spacing formed between the two sets of leads. This unaligned chip arrangement can help facilitate the wire-bonding process for the bonding pads on the second integrated circuit chip.

Abstract: A dual-chip integrated circuit package with unaligned chip arrangement and a method of manufacturing such a dual-chip integrated circuit package are provided. The dual-chip integrated circuit package includes a leadframe having a first set of leads and a second set of leads. The dual-chip integrated circuit package is used to pack two integrated circuit chips in an unaligned chip arrangement, in which the first integrated circuit chip is mounted to one side of the inner part of the first set of leads, and the second integrated circuit chip is mounted to the other side of the same in such a manner as to allow the bonding pads on the second integrated circuit chip to be positioned in the spacing formed between the two sets of leads. This unaligned chip arrangement can help facilitate the wire-bonding process for the bonding pads are the second integrated circuit chip.

Abstract: A dual-chip integrated circuit (IC) package is provided, which is characterized in the use of a an extending portion formed from the leads of a leadframe to provide firm support to the bonding pads on the chips. The dual-chip integrated circuit package utilizes a leadframe having a first leads and a second leads, with a spacing being defined between the first and second leads; and the first leads is extended toward the spacing to form the extending portion at a downset position with respect to the second plane where the leadframe positions leads. A first integrated circuit chip is mounted on the extending portion in such a manner that the front side thereof is attached to the extending portion; and a second integrated circuit chip is attached to the first integrated circuit chip in a back-to-back manner. The bonding pads on the two integrated circuit chips are electrically connected to the first and second leads via a plurality of bonding wires.