Patents by Inventor Liana L. Fong

Liana L. Fong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9947073
    Abstract: Embodiments include method, systems and computer program products for performing memory-aware matrix factorization on a graphics processing unit. Aspects include determining one or more types of memory on the graphics processing unit and determining one or more characteristics of each of the one or more types of memory. Aspects also include assigning each of a plurality of memory accesses of a matrix factorization algorithm to one of the one or more types of memory based on the one or more characteristics and executing the matrix factorization algorithm on the graphics processing unit.
    Type: Grant
    Filed: February 14, 2017
    Date of Patent: April 17, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Liangliang Cao, Liana L. Fong, Wei Tan
  • Patent number: 9947074
    Abstract: Embodiments include method, systems and computer program products for performing memory-aware matrix factorization on a graphics processing unit. Aspects include determining one or more types of memory on the graphics processing unit and determining one or more characteristics of each of the one or more types of memory. Aspects also include assigning each of a plurality of memory accesses of a matrix factorization algorithm to one of the one or more types of memory based on the one or more characteristics and executing the matrix factorization algorithm on the graphics processing unit.
    Type: Grant
    Filed: February 14, 2017
    Date of Patent: April 17, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Liangliang Cao, Liana L. Fong, Wei Tan
  • Publication number: 20180052709
    Abstract: Techniques for dynamically balancing usage of central processing units (CPUs) and accelerators are provided. For example, a method is provided for receiving a task request for associated with a workload. A utility value is calculated for a plurality of strategies for executing the workload. At least two of the plurality of strategies are associated with a distribution of the workload between the CPU and the one or more accelerators. A strategy having a maximum utility value is selected from the plurality of strategies, and the task is executed according to the selected strategy.
    Type: Application
    Filed: August 19, 2016
    Publication date: February 22, 2018
    Inventors: Liana L. Fong, Wei Tan
  • Publication number: 20170371725
    Abstract: A method, information processing system, and computer program product are provided for managing operating system interference on applications in a parallel processing system. A mapping of hardware multi-threading threads to at least one processing core is determined, and first and second sets of logical processors of the at least one processing core are determined. The first set includes at least one of the logical processors of the at least one processing core, and the second set includes at least one of a remainder of the logical processors of the at least one processing core. A processor schedules application tasks only on the logical processors of the first set of logical processors of the at least one processing core. Operating system interference events are scheduled only on the logical processors of the second set of logical processors of the at least one processing core.
    Type: Application
    Filed: August 24, 2017
    Publication date: December 28, 2017
    Applicant: International Business Machines Corporation
    Inventors: John DIVIRGILIO, Liana L. FONG, John LEWARS, Seetharami R. SEELAM, Brian F. VEALE
  • Patent number: 9836334
    Abstract: A method, information processing system, and computer program product are provided for managing operating system interference on applications in a parallel processing system. A mapping of hardware multi-threading threads to at least one processing core is determined, and first and second sets of logical processors of the at least one processing core are determined. The first set includes at least one of the logical processors of the at least one processing core, and the second set includes at least one of a remainder of the logical processors of the at least one processing core. A processor schedules application tasks only on the logical processors of the first set of logical processors of the at least one processing core. Operating system interference events are scheduled only on the logical processors of the second set of logical processors of the at least one processing core.
    Type: Grant
    Filed: June 11, 2013
    Date of Patent: December 5, 2017
    Assignee: International Business Machines Corporation
    Inventors: John Divirgilio, Liana L. Fong, John Lewars, Seetharami R. Seelam, Brian F. Veale
  • Patent number: 9836712
    Abstract: A method and information processing system manage workflow instance migration. A received migration plan indicates a set of workflow migration points associated with an initial workflow process model. The set of workflow migration points is associated with a set of workflow activities of the initial workflow process model. At least one workflow instance is selected from a set of workflow instances. A current migrateability state associated with the selected workflow instance is determined based at least on the set of workflow migration points. Migration of the workflow instance to a new workflow process model is granted in response to determining that the current migrateability state is set to migrateable. Migration of the workflow instance to the new workflow process model is prevented for at least a given amount of time in response to determining that the current migrateability state fails to be set to migrateable.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: December 5, 2017
    Assignee: International Business Machines Corporation
    Inventors: Liana L. Fong, David C. Frank, Linh H. Lam, Zhi Le Zou
  • Publication number: 20170154404
    Abstract: Embodiments include method, systems and computer program products for performing memory-aware matrix factorization on a graphics processing unit. Aspects include determining one or more types of memory on the graphics processing unit and determining one or more characteristics of each of the one or more types of memory. Aspects also include assigning each of a plurality of memory accesses of a matrix factorization algorithm to one of the one or more types of memory based on the one or more characteristics and executing the matrix factorization algorithm on the graphics processing unit.
    Type: Application
    Filed: February 14, 2017
    Publication date: June 1, 2017
    Inventors: LIANGLIANG CAO, LIANA L. FONG, WEI TAN
  • Publication number: 20170154405
    Abstract: Embodiments include method, systems and computer program products for performing memory-aware matrix factorization on a graphics processing unit. Aspects include determining one or more types of memory on the graphics processing unit and determining one or more characteristics of each of the one or more types of memory. Aspects also include assigning each of a plurality of memory accesses of a matrix factorization algorithm to one of the one or more types of memory based on the one or more characteristics and executing the matrix factorization algorithm on the graphics processing unit.
    Type: Application
    Filed: February 14, 2017
    Publication date: June 1, 2017
    Inventors: LIANGLIANG CAO, LIANA L. FONG, WEI TAN
  • Publication number: 20170116157
    Abstract: A computer-implemented method includes receiving a rating matrix R. A matrix X is calculated in a matrix factorization of R, where R?X·?T. Calculating X includes selecting a first value for variable p and a second value for variable q; partitioning ?T by columns into p partitions of ?T; partitioning X by rows into q partitions of X; and partitioning R by rows and columns into p*q partitions of R. Calculating X further includes copying to each accelerator, of a plurality of accelerators, a corresponding partition of ?T, as well as a partition of R corresponding to the accelerator and to a current partition of X. Calculating X further includes calculating, by the plurality of accelerators, a plurality of partial solutions for the current partition of X, and aggregating the plurality of partial solutions into a solution for the current partition of X.
    Type: Application
    Filed: November 30, 2015
    Publication date: April 27, 2017
    Inventors: Liana L. Fong, Wei Tan
  • Publication number: 20170116156
    Abstract: A computer-implemented method includes receiving a rating matrix R. A matrix X is calculated in a matrix factorization of R, where R?X·?T. Calculating X includes selecting a first value for variable p and a second value for variable q; partitioning ?T by columns into p partitions of ?T; partitioning X by rows into q partitions of X; and partitioning R by rows and columns into p*q partitions of R. Calculating X further includes copying to each accelerator, of a plurality of accelerators, a corresponding partition of ?T, as well as a partition of R corresponding to the accelerator and to a current partition of X. Calculating X further includes calculating, by the plurality of accelerators, a plurality of partial solutions for the current partition of X, and aggregating the plurality of partial solutions into a solution for the current partition of X.
    Type: Application
    Filed: October 22, 2015
    Publication date: April 27, 2017
    Inventors: Liana L. Fong, Wei Tan
  • Patent number: 9626736
    Abstract: Embodiments include method, systems and computer program products for performing memory-aware matrix factorization on a graphics processing unit. Aspects include determining one or more types of memory on the graphics processing unit and determining one or more characteristics of each of the one or more types of memory. Aspects also include assigning each of a plurality of memory accesses of a matrix factorization algorithm to one of the one or more types of memory based on the one or more characteristics and executing the matrix factorization algorithm on the graphics processing unit.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: April 18, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Liangliang Cao, Liana L. Fong, Wei Tan
  • Patent number: 9626107
    Abstract: Embodiments include method, systems and computer program products for performing memory-aware matrix factorization on a graphics processing unit. Aspects include determining one or more types of memory on the graphics processing unit and determining one or more characteristics of each of the one or more types of memory. Aspects also include assigning each of a plurality of memory accesses of a matrix factorization algorithm to one of the one or more types of memory based on the one or more characteristics and executing the matrix factorization algorithm on the graphics processing unit.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: April 18, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Liangliang Cao, Liana L. Fong, Wei Tan
  • Publication number: 20170097856
    Abstract: Various embodiments monitor system noise in a parallel computing system. In one embodiment, at least one set of system noise data is stored in a shared buffer during a first computation interval. The set of system noise data is detected during the first computation interval and is associated with at least one parallel thread in a plurality of parallel threads. Each thread in the plurality of parallel threads is a thread of a program. The set of system noise data is filtered during a second computation interval based on at least one filtering condition creating a filtered set of system noise data. The filtered set of system noise data is then stored.
    Type: Application
    Filed: December 16, 2016
    Publication date: April 6, 2017
    Applicant: International Business Machines Corporation
    Inventors: Keun Soo YIM, Seetharami R. SEELAM, Liana L. FONG, Arun IYENGAR, John LEWARS
  • Patent number: 9558095
    Abstract: Various embodiments monitor system noise in a parallel computing system. In one embodiment, at least one set of system noise data is stored in a shared buffer during a first computation interval. The set of system noise data is detected during the first computation interval and is associated with at least one parallel thread in a plurality of parallel threads. Each thread in the plurality of parallel threads is a thread of a program. The set of system noise data is filtered during a second computation interval based on at least one filtering condition creating a filtered set of system noise data. The filtered set of system noise data is then stored.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: January 31, 2017
    Assignee: International Business Machines Corporation
    Inventors: Keun Soo Yim, Seetharami R. Seelam, Liana L. Fong, Arun Iyengar, John Lewars
  • Publication number: 20160371809
    Abstract: Embodiments include method, systems and computer program products for performing memory-aware matrix factorization on a graphics processing unit. Aspects include determining one or more types of memory on the graphics processing unit and determining one or more characteristics of each of the one or more types of memory. Aspects also include assigning each of a plurality of memory accesses of a matrix factorization algorithm to one of the one or more types of memory based on the one or more characteristics and executing the matrix factorization algorithm on the graphics processing unit.
    Type: Application
    Filed: June 18, 2015
    Publication date: December 22, 2016
    Inventors: LIANGLIANG CAO, LIANA L. FONG, WEI TAN
  • Publication number: 20160371005
    Abstract: Embodiments include method, systems and computer program products for performing memory-aware matrix factorization on a graphics processing unit. Aspects include determining one or more types of memory on the graphics processing unit and determining one or more characteristics of each of the one or more types of memory. Aspects also include assigning each of a plurality of memory accesses of a matrix factorization algorithm to one of the one or more types of memory based on the one or more characteristics and executing the matrix factorization algorithm on the graphics processing unit.
    Type: Application
    Filed: December 14, 2015
    Publication date: December 22, 2016
    Inventors: LIANGLIANG CAO, LIANA L. FONG, WEI TAN
  • Publication number: 20160364424
    Abstract: A method for processing a dataset in a partitioned distributed storage system having data stored in a base table and an index stored in an index table, may include receiving base and index table metadata from the partitioned distributed storage system, where the base and index table metadata includes respective table partition information. The method may further include partitioning the dataset into a set of base-delta files according to the base table metadata, and generating a set of index-delta files corresponding with the base-delta files according to the index table metadata. The method may additionally include updating the partitioned distributed storage system with the set of base-delta and the set of index-delta files, where a first update of the base table is synchronous with a second update of the index table.
    Type: Application
    Filed: June 12, 2015
    Publication date: December 15, 2016
    Inventors: Yuan-Chi Chang, Liana L. Fong, Wei Tan
  • Publication number: 20160358098
    Abstract: A method, system, and/or computer program product manages the lifecycle of trained models used to deliver cognitive services. One or more processors obtain and deploy a cognitive engine that utilizes artificial intelligence (AI), machine learning, and/or similar algorithms. One or more processors obtain and deploy a version of a trained model that includes data that supports cognitive operations of the cognitive engine within a cognitive service. In response to changes to the input used to produce the trained model, one or more processors obtain and deploy a subsequent version of the trained model in support of the cognitive service.
    Type: Application
    Filed: June 4, 2015
    Publication date: December 8, 2016
    Inventors: Evelyn Duesterwald, Maria R. Ebling, Liana L. Fong
  • Patent number: 9460147
    Abstract: A method for processing a dataset in a partitioned distributed storage system having data stored in a base table and an index stored in an index table, may include receiving base and index table metadata from the partitioned distributed storage system, where the base and index table metadata includes respective table partition information. The method may further include partitioning the dataset into a set of base-delta files according to the base table metadata, and generating a set of index-delta files corresponding with the base-delta files according to the index table metadata. The method may additionally include updating the partitioned distributed storage system with the set of base-delta and the set of index-delta files, where a first update of the base table is synchronous with a second update of the index table.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: October 4, 2016
    Assignee: International Business Machines Corporation
    Inventors: Yuan-Chi Chang, Liana L. Fong, Wei Tan
  • Publication number: 20160210212
    Abstract: Various embodiments monitor system noise in a parallel computing system. In one embodiment, at least one set of system noise data is stored in a shared buffer during a first computation interval. The set of system noise data is detected during the first computation interval and is associated with at least one parallel thread in a plurality of parallel threads. Each thread in the plurality of parallel threads is a thread of a program. The set of system noise data is filtered during a second computation interval based on at least one filtering condition creating a filtered set of system noise data. The filtered set of system noise data is then stored.
    Type: Application
    Filed: March 30, 2016
    Publication date: July 21, 2016
    Applicant: International Business Machines Corporation
    Inventors: Keun Soo YIM, Seetharami R. SEELAM, Liana L. FONG, Arun IYENGAR, John LEWARS