Patents by Inventor Liang-An Zheng

Liang-An Zheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Automatic hold time fixing circuit unit
    Patent number: 7876127
    Abstract: An automatic hold time fixing circuit unit includes a first switch having first and second ends connected to data input and output ports. An input end of a memory element is connected to the second end of the first switch. A second switch includes a first end connected to an output end of the memory element and a second end connected to the data output port. A control circuit includes first and second output terminals and first and second input terminals. The first and second output terminals are connected to control ends of the first and second switches. The first and second input terminals allow input of two clocks to the control circuit for controlling connection or disconnection of the first and second switches. The data stored in the memory element can be utilized to fix a hold time of the data, so that correct data can be obtained at the data output port.
    Type: Grant
    Filed: August 7, 2009
    Date of Patent: January 25, 2011
    Assignee: National Kaohsiung University of Applied Sciences
    Inventors: Liang-An Zheng, Pu-Jen Cheng, Shinn-Horng Chen
  • AUTOMATIC HOLD TIME FIXING CIRCUIT UNIT
    Publication number: 20100295592
    Abstract: An automatic hold time fixing circuit unit includes a first switch having first and second ends connected to data input and output ports. An input end of a memory element is connected to the second end of the first switch. A second switch includes a first end connected to an output end of the memory element and a second end connected to the data output port. A control circuit includes first and second output terminals and first and second input terminals. The first and second output terminals are connected to control ends of the first and second switches. The first and second input terminals allow input of two clocks to the control circuit for controlling connection or disconnection of the first and second switches. The data stored in the memory element can be utilized to fix a hold time of the data, so that correct data can be obtained at the data output port.
    Type: Application
    Filed: August 7, 2009
    Publication date: November 25, 2010
    Inventors: Liang-An Zheng, Pu-Jen Cheng, Shinn-Horng Chen