Patents by Inventor Liangbo Wang
Liangbo Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220326733Abstract: The present disclosure provides a backplane, a frame structure and a display device. The backplane provided in the present disclosure is secured to a middle frame in a display panel to form a frame structure of the display panel, the backplane including: a bottom plate and a skirt connected to edges of the bottom plate, wherein at least part of the skirt is provided with a clamping member for securing the backplane to the middle frame, the clamping member is provided with a breakable structure configured to break under an external force for disengaging the clamping member from the skirt so that the backplane is separated from the middle frame.Type: ApplicationFiled: June 28, 2022Publication date: October 13, 2022Inventors: Guangning HAO, Xiaojin LI, Liangbo WANG
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Patent number: 11402866Abstract: The present disclosure provides a backplane, a frame structure and a display device. The backplane provided in the present disclosure is secured to a middle frame in a display panel to form a frame structure of the display panel, the backplane including: a bottom plate and a skirt connected to edges of the bottom plate, wherein at least part of the skirt is provided with a clamping member for securing the backplane to the middle frame, the clamping member is provided with a dismounting structure for disengaging the clamping member from the skirt under an external force so that the backplane is separated from the middle frame.Type: GrantFiled: July 31, 2020Date of Patent: August 2, 2022Assignees: K-TRONICS (SUZHOU) TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Guangning Hao, Xiaojin Li, Liangbo Wang
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Publication number: 20210096593Abstract: The present disclosure provides a backplane, a frame structure and a display device. The backplane provided in the present disclosure is secured to a middle frame in a display panel to form a frame structure of the display panel, the backplane including: a bottom plate and a skirt connected to edges of the bottom plate, wherein at least part of the skirt is provided with a clamping member for securing the backplane to the middle frame, the clamping member is provided with a dismounting structure for disengaging the clamping member from the skirt under an external force so that the backplane is separated from the middle frame.Type: ApplicationFiled: July 31, 2020Publication date: April 1, 2021Inventors: Guangning HAO, Xiaojin LI, Liangbo WANG
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Patent number: 10340409Abstract: Various embodiments of a compensated photonic device structure and fabrication method thereof are described herein. In one aspect, a photonic device may include a substrate and a functional layer disposed on the substrate. The substrate may be made of a first material and the functional layer may be made of a second material that is different from the first material. The photonic device may also include a compensation region formed at an interface region between the substrate and the functional layer. The compensation region may be doped with compensation dopants such that a first carrier concentration around the interface region of function layer is reduced and a second carrier concentration in a bulk region of functional layer is reduced.Type: GrantFiled: June 2, 2017Date of Patent: July 2, 2019Assignee: SIFOTONICS TECHNOLOGIES CO., LTD.Inventors: Mengyuan Huang, Liangbo Wang, Su Li, Tuo Shi, Pengfei Cai, Wang Chen, Ching-yin Hong, Dong Pan
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Patent number: 9780248Abstract: Avalanche photodiodes (APDs) having at least one top stressor layer disposed on a germanium (Ge) absorption layer are described herein. The top stressor layer can increase the tensile strain of the Ge absorption layer, thus extending the absorption of APDs to longer wavelengths beyond 1550 nm. In one embodiment, the top stressor layer has a four-layer structure, including an amorphous silicon (Si) layer disposed on the Ge absorption layer; a first silicon dioxide (SiO2) layer disposed on the amorphous Si layer, a silicon nitride (SiN) layer disposed on the first SiO2 layer, and a second SiO2 layer disposed on the SiN layer. The Ge absorption layer can be further doped by p-type dopants. The doping concentration of p-type dopants is controlled such that a graded doping profile is formed within the Ge absorption layer to decrease the dark currents in APDs.Type: GrantFiled: June 13, 2014Date of Patent: October 3, 2017Assignee: SIFOTONICS TECHNOLOGIES CO., LTD.Inventors: Mengyuan Huang, Pengfei Cai, Dong Pan, Liangbo Wang, Su Li, Tuo Shi, Tzung I Su, Wang Chen, Ching-yin Hong
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Publication number: 20170271545Abstract: Various embodiments of a compensated photonic device structure and fabrication method thereof are described herein. In one aspect, a photonic device may include a substrate and a functional layer disposed on the substrate. The substrate may be made of a first material and the functional layer may be made of a second material that is different from the first material. The photonic device may also include a compensation region formed at an interface region between the substrate and the functional layer. The compensation region may be doped with compensation dopants such that a first carrier concentration around the interface region of function layer is reduced and a second carrier concentration in a bulk region of functional layer is reduced.Type: ApplicationFiled: June 2, 2017Publication date: September 21, 2017Inventors: Mengyuan Huang, Liangbo Wang, Su Li, Tuo Shi, Pengfei Cai, Wang Chen, Ching-yin Hong, Dong Pan
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Patent number: 9698296Abstract: Various embodiments of a compensated photonic device structure and fabrication method thereof are described herein. In one aspect, a photonic device may include a substrate and a functional layer disposed on the substrate. The substrate may be made of a first material and the functional layer may be made of a second material that is different from the first material. The photonic device may also include a compensation region formed at an interface region between the substrate and the functional layer. The compensation region may be doped with compensation dopants such that a first carrier concentration around the interface region of function layer is reduced and a second carrier concentration in a bulk region of functional layer is reduced.Type: GrantFiled: July 8, 2014Date of Patent: July 4, 2017Assignee: SIFOTONICS TECHNOLOGIES CO., LTD.Inventors: Mengyuan Huang, Liangbo Wang, Su Li, Tuo Shi, Pengfei Cai, Wang Chen, Ching-yin Hong, Dong Pan
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Patent number: 9583664Abstract: Various embodiments of a novel structure of a Ge/Si avalanche photodiode with an integrated heater, as well as a fabrication method thereof, are provided. In one aspect, a doped region is formed either on the top silicon layer or the silicon substrate layer to function as a resistor. When the environmental temperature decreases to a certain point, a temperature control loop will be automatically triggered and a proper bias is applied along the heater, thus the temperature of the junction region of a Ge/Si avalanche photodiode is kept within an optimized range to maintain high sensitivity of the avalanche photodiode and low bit-error rate level.Type: GrantFiled: February 3, 2016Date of Patent: February 28, 2017Assignee: SIFOTONICS TECHNOLOGIES CO., LTD.Inventors: Tuo Shi, Pengfei Cai, Liangbo Wang, Nai Zhang, Wang Chen, Su Li, Ching-yin Hong, Mengyuan Huang, Dong Pan
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Patent number: 9478689Abstract: A high-speed germanium on silicon (Ge/Si) avalanche photodiode may include a substrate layer, a bottom contact layer disposed on the substrate layer, a buffer layer disposed on the bottom contact layer, an electric field control layer disposed on the buffer layer, an avalanche layer disposed on the electric field control layer, a charge layer disposed on the avalanche layer, an absorption layer disposed on the charge layer, and a top contact layer disposed on the absorption layer. The electric field contact layer may be configured to control an electric field in the avalanche layer.Type: GrantFiled: December 7, 2015Date of Patent: October 25, 2016Assignee: SIFOTONICS TECHNOLOGIES CO., LTD.Inventors: Mengyuan Huang, Pengfei Cai, Liangbo Wang, Su Li, Wang Chen, Ching-yin Hong, Dong Pan
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Patent number: 9397243Abstract: Various embodiments of a germanium-on-silicon (Ge—Si) avalanche photodiode are provided. In one aspect, the Ge—Si avalanche photodiode utilizes a silicon carrier-energy-relaxation layer to reduce the energy of holes drifting into absorption layer where the absorption material has lower ionization threshold, thereby suppressing multiplication noise and increasing the gain-bandwidth product of the avalanche photodiode.Type: GrantFiled: July 23, 2014Date of Patent: July 19, 2016Assignee: SIFOTONICS TECHNOLOGIES CO., LTD.Inventors: Tuo Shi, Mengyuan Huang, Pengfei Cai, Su Li, Ching-yin Hong, Wang Chen, Liangbo Wang, Dong Pan
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Patent number: 9373938Abstract: Various embodiments of a photonic device and fabrication method thereof are described herein. A device may include a substrate, a bottom contact layer, a current confinement layer, an intrinsic layer, an absorption layer, and a top contact layer. The bottom contact layer may be of a first polarity and may be disposed on the substrate. The current confinement layer may be disposed on the bottom contact layer. The intrinsic layer may be disposed on the current confinement layer. The absorption layer may be disposed on the intrinsic layer. The top contact layer may be of a second polarity and may be disposed on the absorption layer. The second polarity is opposite to the first polarity.Type: GrantFiled: May 6, 2015Date of Patent: June 21, 2016Assignee: SIFOTONICS TECHNOLOGIES CO., LTD.Inventors: Mengyuan Huang, Pengfei Cai, Liangbo Wang, Su Li, Wang Chen, Ching-yin Hong, Dong Pan
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Publication number: 20160172525Abstract: A high-speed germanium on silicon (Ge/Si) avalanche photodiode may include a substrate layer, a bottom contact layer disposed on the substrate layer, a buffer layer disposed on the bottom contact layer, an electric field control layer disposed on the buffer layer, an avalanche layer disposed on the electric field control layer, a charge layer disposed on the avalanche layer, an absorption layer disposed on the charge layer, and a top contact layer disposed on the absorption layer. The electric field contact layer may be configured to control an electric field in the avalanche layer.Type: ApplicationFiled: December 7, 2015Publication date: June 16, 2016Inventors: Mengyuan Huang, Pengfei Cai, Liangbo Wang, Su Li, Wang Chen, Ching-yin Hong, Dong Pan
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Publication number: 20160155883Abstract: Various embodiments of a novel structure of a Ge/Si avalanche photodiode with an integrated heater, as well as a fabrication method thereof, are provided. In one aspect, a doped region is formed either on the top silicon layer or the silicon substrate layer to function as a resistor. When the environmental temperature decreases to a certain point, a temperature control loop will be automatically triggered and a proper bias is applied along the heater, thus the temperature of the junction region of a Ge/Si avalanche photodiode is kept within an optimized range to maintain high sensitivity of the avalanche photodiode and low bit-error rate level.Type: ApplicationFiled: February 3, 2016Publication date: June 2, 2016Inventors: Tuo Shi, Pengfei Cai, Liangbo Wang, Nai Zhang, Wang Chen, Su Li, Ching-yin Hong, Mengyuan Huang, Dong Pan
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Patent number: 9299864Abstract: Various embodiments of a novel structure of a Ge/Si avalanche photodiode with an integrated heater, as well as a fabrication method thereof, are provided. In one aspect, a doped region is formed either on the top silicon layer or the silicon substrate layer to function as a resistor. When the environmental temperature decreases to a certain point, a temperature control loop will be automatically triggered and a proper bias is applied along the heater, thus the temperature of the junction region of a Ge/Si avalanche photodiode is kept within an optimized range to maintain high sensitivity of the avalanche photodiode and low bit-error rate level.Type: GrantFiled: January 26, 2015Date of Patent: March 29, 2016Assignee: SiFotonics Technologies Co., Ltd.Inventors: Tuo Shi, Pengfei Cai, Liangbo Wang, Nai Zhang, Wang Chen, Su Li, Ching-yin Hong, Mengyuan Huang, Dong Pan
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Patent number: 9287432Abstract: Various embodiments of a germanium-on-silicon (Ge—Si) photodiode are provided along with the fabrication method thereof. In one aspect, a Ge—Si photodiode includes a doped bottom region at the bottom of a germanium layer, formed by thermal diffusion of donors implanted into a silicon layer. The Ge—Si photodiode further includes a doped sidewall region of Ge mesa formed by ion implantation. Thus, the electric field is distributed in the intrinsic region of the Ge—Si photodiode where there is low dislocation density. The doped bottom region and sidewall region of the Ge layer prevent electric field from penetrating into the Ge—Si interface and Ge mesa sidewall region, where a large amount of dislocations are distributed. This design significantly suppresses dark current.Type: GrantFiled: July 23, 2014Date of Patent: March 15, 2016Assignee: SiFotonics Technologies Co, Ltd.Inventors: Tuo Shi, Liangbo Wang, Pengfei Cai, Ching-yin Hong, Mengyuan Huang, Wang Chen, Su Li, Dong Pan
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Publication number: 20150243800Abstract: Various embodiments of a novel structure of a Ge/Si avalanche photodiode with an integrated heater, as well as a fabrication method thereof, are provided. In one aspect, a doped region is formed either on the top silicon layer or the silicon substrate layer to function as a resistor. When the environmental temperature decreases to a certain point, a temperature control loop will be automatically triggered and a proper bias is applied along the heater, thus the temperature of the junction region of a Ge/Si avalanche photodiode is kept within an optimized range to maintain high sensitivity of the avalanche photodiode and low bit-error rate level.Type: ApplicationFiled: January 26, 2015Publication date: August 27, 2015Inventors: Tuo Shi, Pengfei Cai, Liangbo Wang, Nai Zhang, Wang Chen, Su Li, Ching-yin Hong, Mengyuan Huang, Dong Pan
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Publication number: 20150236478Abstract: Various embodiments of a photonic device and fabrication method thereof are described herein. A device may include a substrate, a bottom contact layer, a current confinement layer, an intrinsic layer, an absorption layer, and a top contact layer. The bottom contact layer may be of a first polarity and may be disposed on the substrate. The current confinement layer may be disposed on the bottom contact layer. The intrinsic layer may be disposed on the current confinement layer. The absorption layer may be disposed on the intrinsic layer. The top contact layer may be of a second polarity and may be disposed on the absorption layer. The second polarity is opposite to the first polarity.Type: ApplicationFiled: May 6, 2015Publication date: August 20, 2015Inventors: Mengyuan Huang, Pengfei Cai, Liangbo Wang, Su Li, Wang Chen, Ching-yin Hong, Dong Pan
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Patent number: 9042417Abstract: Various embodiments of a photonic device and fabrication method thereof are provided. In one aspect, a device includes a substrate, a current confinement layer disposed on the substrate, an absorption layer disposed in the current confinement layer, and an electrical contact layer disposed on the absorption layer. The current confinement layer is doped in a pattern and configured to reduce dark current in the device. The photonic device may be a photodiode or a laser.Type: GrantFiled: November 13, 2013Date of Patent: May 26, 2015Assignee: SiFotonics Technologies Co., Ltd.Inventors: Mengyuan Huang, Liangbo Wang, Wang Chen, Ching-yin Hong, Dong Pan
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Publication number: 20150028443Abstract: Various embodiments of a germanium-on-silicon (Ge—Si) avalanche photodiode are provided. In one aspect, the Ge—Si avalanche photodiode utilizes a silicon buffer layer to reduce the energy of holes drifting into absorption layer where the absorption material has lower ionization threshold, thereby suppressing multiplication noise and increasing the gain-bandwidth product of the avalanche photodiode. In another aspect, the Ge—Si avalanche photodiode utilizes an edge electric field buffer layer region to reduce the electric field along the sidewall of multiplication layer, where high electric field is applied for avalanche, thereby reducing probability of sidewall breakdown and enhancing reliability of the avalanche photodiode.Type: ApplicationFiled: July 23, 2014Publication date: January 29, 2015Inventors: Tuo Shi, Mengyuan Huang, Pengfei Cai, Su Li, Ching-yin Hong, Wang Chen, Liangbo Wang, Dong Pan
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Publication number: 20150028386Abstract: Various embodiments of a germanium-on-silicon (Ge—Si) photodiode are provided along with the fabrication method thereof. In one aspect, a Ge—Si photodiode includes a doped bottom region at the bottom of a germanium layer, formed by thermal diffusion of donors implanted into a silicon layer. The Ge—Si photodiode further includes a doped sidewall region of Ge mesa formed by ion implantation. Thus, the electric field is distributed in the intrinsic region of the Ge—Si photodiode where there is low dislocation density. The doped bottom region and sidewall region of the Ge layer prevent electric field from penetrating into the Ge—Si interface and Ge mesa sidewall region, where a large amount of dislocations are distributed. This design significantly suppresses dark current.Type: ApplicationFiled: July 23, 2014Publication date: January 29, 2015Inventors: Tuo Shi, Liangbo Wang, Pengfei Cai, Ching-yin Hong, Mengyuan Huang, Wang Chen, Su Li, Dong Pan