Patents by Inventor Liang Chee Tay

Liang Chee Tay has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9324676
    Abstract: Packaged microelectronic devices and methods of manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a method of manufacturing a microelectronic device includes forming a stand-off layer over a plurality of microelectronic dies on a semiconductor workpiece, and removing selected portions of the stand-off layer to form a plurality of stand-offs with the individual stand-offs positioned on a backside of a corresponding die. The method further includes cutting the semiconductor workpiece to singulate the dies, and attaching the stand-off on a first singulated die to a second die.
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: April 26, 2016
    Assignee: Micron Technology, Inc.
    Inventors: See Hiong Leow, Liang Chee Tay
  • Publication number: 20150130035
    Abstract: Packaged microelectronic devices and methods of manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a method of manufacturing a microelectronic device includes forming a stand-off layer over a plurality of microelectronic dies on a semiconductor workpiece, and removing selected portions of the stand-off layer to form a plurality of stand-offs with the individual stand-offs positioned on a backside of a corresponding die. The method further includes cutting the semiconductor workpiece to singulate the dies, and attaching the stand-off on a first singulated die to a second die.
    Type: Application
    Filed: December 2, 2014
    Publication date: May 14, 2015
    Inventors: See Hiong Leow, Liang Chee Tay
  • Patent number: 8900923
    Abstract: Packaged microelectronic devices and methods of manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a method of manufacturing a microelectronic device includes forming a stand-off layer over a plurality of microelectronic dies on a semiconductor workpiece, and removing selected portions of the stand-off layer to form a plurality of stand-offs with the individual stand-offs positioned on a backside of a corresponding die. The method further includes cutting the semiconductor workpiece to singulate the dies, and attaching the stand-off on a first singulated die to a second die.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: December 2, 2014
    Assignee: Micron Technology, Inc.
    Inventors: See Hiong Leow, Liang Chee Tay
  • Patent number: 8399971
    Abstract: Packaged microelectronic devices and methods of manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a method of manufacturing a microelectronic device includes forming a stand-off layer over a plurality of microelectronic dies on a semiconductor workpiece, and removing selected portions of the stand-off layer to form a plurality of stand-offs with the individual stand-offs positioned on a backside of a corresponding die. The method further includes cutting the semiconductor workpiece to singulate the dies, and attaching the stand-off on a first singulated die to a second die.
    Type: Grant
    Filed: June 2, 2010
    Date of Patent: March 19, 2013
    Assignee: Micron Technology, Inc.
    Inventors: See Hiong Leow, Liang Chee Tay
  • Publication number: 20100237510
    Abstract: Packaged microelectronic devices and methods of manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a method of manufacturing a microelectronic device includes forming a stand-off layer over a plurality of microelectronic dies on a semiconductor workpiece, and removing selected portions of the stand-off layer to form a plurality of stand-offs with the individual stand-offs positioned on a backside of a corresponding die. The method further includes cutting the semiconductor workpiece to singulate the dies, and attaching the stand-off on a first singulated die to a second die.
    Type: Application
    Filed: June 2, 2010
    Publication date: September 23, 2010
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: See Hiong Leow, Liang Chee Tay
  • Patent number: 7741150
    Abstract: Packaged microelectronic devices and methods of manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a method of manufacturing a microelectronic device includes forming a stand-off layer over a plurality of microelectronic dies on a semiconductor workpiece, and removing selected portions of the stand-off layer to form a plurality of stand-offs with the individual stand-offs positioned on a backside of a corresponding die. The method further includes cutting the semiconductor workpiece to singulate the dies, and attaching the stand-off on a first singulated die to a second die.
    Type: Grant
    Filed: January 24, 2007
    Date of Patent: June 22, 2010
    Assignee: Micron Technology, Inc.
    Inventors: See Hiong Leow, Liang Chee Tay
  • Publication number: 20080172869
    Abstract: Methods and systems for processing semiconductor workpieces are disclosed herein. In one embodiment, a method for processing a semiconductor workpiece includes releasably attaching a plurality of microelectronic dies to a first side of a releasable film, and at least partially detaching one of the dies from the releasable film by pivoting a contact member with a surface of the contact member pressing against a second side of the releasable film.
    Type: Application
    Filed: April 30, 2007
    Publication date: July 24, 2008
    Applicant: Micron Technology, Inc.
    Inventors: Kia Heng Puah, Liang Chee Tay
  • Publication number: 20080128900
    Abstract: Packaged microelectronic devices and methods of manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a method of manufacturing a microelectronic device includes forming a stand-off layer over a plurality of microelectronic dies on a semiconductor workpiece, and removing selected portions of the stand-off layer to form a plurality of stand-offs with the individual stand-offs positioned on a backside of a corresponding die. The method further includes cutting the semiconductor workpiece to singulate the dies, and attaching the stand-off on a first singulated die to a second die.
    Type: Application
    Filed: January 24, 2007
    Publication date: June 5, 2008
    Applicant: Micron Technology, Inc.
    Inventors: See Hiong Leow, Liang Chee Tay
  • Patent number: 6544816
    Abstract: An apparatus for the fabrication of a semiconductor device comprising: a mold having top and bottom halves, each with cavities for holding semiconductor chips pre-assembled on an electrically insulating interposer; one of said halves having a plurality of runners and a plurality of gates for feeding encapsulation material into said cavities; said plurality of runners comprising pairs of runners parallel to each other, having gates opposite to each other, thereby forming dual gates; each pair of runners being configured such that encapsulation material will exit from adjacent gates concurrently; and each pair of dual gates being structured such that they fill the cavity between them uniformly with encapsulation material, thereby encapsulating thin semiconductor devices.
    Type: Grant
    Filed: August 20, 1999
    Date of Patent: April 8, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Tiang Hock Lim, Liang Chee Tay
  • Patent number: 6331737
    Abstract: A method of encapsulating a semiconductor device comprising the steps of providing a mold having top and bottom halves each with cavities for holding semiconductor devices, and further having gates and runners for feeding encapsulation material into said cavities; lining said cavities with protective plastic films; providing a plurality of semiconductor integrated circuit chips, each having an outline; providing an electrically insulating interposer; assembling said chip and said interposer, loading said assembly into said mold and introducing into said mold a low-viscosity, high adhesion encapsulation material; at least partially curing said encapsulation material, thereby forming a flat, high-luster surface; opening said mold and removing said interposer together with said encapsulated chips from said mold; attaching an array of solder balls to the exposed surface of said interposer; and singulating said encapsulated semiconductor devices, thereby forming devices having an outline substantially the same as
    Type: Grant
    Filed: August 25, 1999
    Date of Patent: December 18, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Tiang Hock Lim, Liang Chee Tay