Abstract: A package structure is provided. The package structure includes a leadframe, a GaN power device, and an electrostatic discharge protection component. The leadframe includes a gate pad, a source pad, and a drain pad, which are disposed on the leadframe. The GaN power device has a gate end. The GaN power device is disposed on the source pad of the leadframe. The electrostatic discharge protection component includes a first pad. The first pad is disposed on the electrostatic discharge protection component. The electrostatic discharge protection component is disposed on the source pad of the leadframe. The gate end of the GaN power device is electrically connected to the first pad of the electrostatic discharge protection component. The first pad of the electrostatic discharge protection component is electrically connected to the gate pad of the leadframe.

Abstract: A package structure is provided. The package structure includes a leadframe, a GaN power device, and an electrostatic discharge protection component. The leadframe includes a gate pad, a source pad, and a drain pad, which are disposed on the leadframe. The GaN power device has a gate end. The GaN power device is disposed on the source pad of the leadframe. The electrostatic discharge protection component includes a first pad. The first pad is disposed on the electrostatic discharge protection component. The electrostatic discharge protection component is disposed on the source pad of the leadframe. The gate end of the GaN power device is electrically connected to the first pad of the electrostatic discharge protection component. The first pad of the electrostatic discharge protection component is electrically connected to the gate pad of the leadframe.

Abstract: A package structure includes a substrate, a first capacitor, a System on Chip unit and a wiring layer. The first capacitor is provided on the substrate. The System on Chip unit is bonded with the first capacitor in a first dielectric layer. The wiring layer is configured to electrically couple the first capacitor and the System on Chip unit. The wiring layer is provided on the first dielectric layer through a second dielectric layer.

Abstract: A package structure is provided. The package structure includes a substrate, a plurality of active components, a plurality of separated metal parts and an encapsulation material. The substrate has a first surface and a second surface. Each active component has a first surface and a second surface. Each metal part has a first surface and a second surface. The first surface of each active component is connected to the first surface of the substrate. The first surface of one metal part is connected to the second surface of one active component. Each metal part extends to connect to the first surface of the substrate. The encapsulation material covers the first surface of the substrate and surrounds the active components and the metal parts. The second surface of each metal part and the second surface of the substrate are exposed from the encapsulation material.

Abstract: An integrated circuit includes a first power transistor, a second power transistor, and an isolator. The first power transistor is integrated with a first driving circuit. The second power transistor is integrated with a second driving circuit. The isolator provides a first control signal and a second control signal to the first power transistor and a second power transistor respectively, according to an input signal.

Abstract: A package structure includes a substrate, a first capacitor, a System on Chip unit and a wiring layer. The first capacitor is provided on the substrate. The System on Chip unit is bonded with the first capacitor in a first dielectric layer. The wiring layer is configured to electrically couple the first capacitor and the System on Chip unit. The wiring layer is provided on the first dielectric layer through a second dielectric layer.

Abstract: An integrated circuit includes a first power transistor, a second power transistor, and an isolator. The first power transistor is integrated with a first driving circuit. The second power transistor is integrated with a second driving circuit. The isolator provides a first control signal and a second control signal to the first power transistor and a second power transistor respectively, according to an input signal.

Abstract: An access control system is disclosed comprising a credential reader arranged to gather at least one credential from a person desiring to pass through an access point associated with the access control system, the system being arranged to use the at least one credential to provide an indication about the identity of the person. The system also comprises at least one access control device controlling access through a respective access point such that a person is allowed or denied access dependent on whether the person is positively identified, and a data storage device that stores data indicative of a current security level applicable for each access point associated with the system, the security level defining the criteria required to provide a positive identification of the person. Stored security level data can be modified to change the criteria required for positively identifying a person.