Patents by Inventor Liang-Chieh Chen

Liang-Chieh Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250218161
    Abstract: Methods and systems for generating a feature map from an image is disclosed. The vision system includes a vision model or processing the image to generate the feature map according a neural network. The vision model includes a first convolutional block for downsampling a set of image data to obtain a first stage convoluted data; a second convolutional block for downsampling the first stage convoluted data to obtain a second stage convoluted data, wherein one or both of the first convolutional block and the second convolutional block is a mobile convolution block (MBConv) that includes: a first Gaussian Error Linear Unit (GELU) layer, a depth-wise convolution (DWConv) layer having, and a resizing convolution layer; and a transformer block (TFB) generating the feature map from the second stage convoluted data.
    Type: Application
    Filed: January 2, 2024
    Publication date: July 3, 2025
    Inventors: Qihang Yu, Jieneng Chen, Xiaohui Shen, Liang-Chieh Chen
  • Publication number: 20250157235
    Abstract: A computing system including one or more processing devices configured to receive an image. The processing devices are further configured to compute a segmentation mask that identifies a region of interest included in the image. At a feature extractor, the processing devices are further configured to compute encoded image features based on the image. The processing devices are further configured to receive a text instruction. At a visual resampler, the processing devices are further configured to compute a mask query based on the segmentation mask, the encoded image features, and the text instruction. At a generative language model, the processing devices are further configured to receive a natural language query that includes the mask query and the text instruction. Based on the natural language query, at the generative language model, the processing devices are further configured to generate and output a semantic label associated with the region of interest.
    Type: Application
    Filed: November 14, 2023
    Publication date: May 15, 2025
    Inventors: Qihang Yu, Xiaohui Shen, Liang-Chieh Chen
  • Publication number: 20250113087
    Abstract: The present disclosure describes techniques for implementing video segmentation. A video is divided into a plurality of clips. Each of the plurality of clips comprises several frames. Axial-trajectory attention is applied to each of the plurality of clips by a first sub-model. Clip features corresponding to each of the plurality of clips are generated by the first sub-model. A set of object queries corresponding to each of the plurality of clips is generated based on the clip features by a transformer decoder. Trajectory attention is applied to refine sets of object queries corresponding to the plurality of clips by a second sub-model. Video-level segmentation results are generated based on the refined object queries.
    Type: Application
    Filed: December 22, 2023
    Publication date: April 3, 2025
    Inventors: Ju He, Qihang Yu, Inkyu Shin, Xueqing Deng, Xiaohui Shen, Liang-Chieh Chen
  • Publication number: 20250045929
    Abstract: Single-stage frameworks for open-vocabulary panoptic segmentation are provided.
    Type: Application
    Filed: August 3, 2023
    Publication date: February 6, 2025
    Inventors: Qihang Yu, Ju He, Xueqing Deng, Xiaohui Shen, Liang-Chieh Chen
  • Publication number: 20240119256
    Abstract: The present disclosure provides directed to new, more efficient neural network architectures. As one example, in some implementations, the neural network architectures of the present disclosure can include a linear bottleneck layer positioned structurally prior to and/or after one or more convolutional layers, such as, for example, one or more depthwise separable convolutional layers. As another example, in some implementations, the neural network architectures of the present disclosure can include one or more inverted residual blocks where the input and output of the inverted residual block are thin bottleneck layers, while an intermediate layer is an expanded representation. For example, the expanded representation can include one or more convolutional layers, such as, for example, one or more depthwise separable convolutional layers. A residual shortcut connection can exist between the thin bottleneck layers that play a role of an input and output of the inverted residual block.
    Type: Application
    Filed: October 13, 2023
    Publication date: April 11, 2024
    Inventors: Andrew Gerald Howard, Mark Sandler, Liang-Chieh Chen, Andrey Zhmoginov, Menglong Zhu
  • Patent number: 11823024
    Abstract: The present disclosure provides directed to new, more efficient neural network architectures. As one example, in some implementations, the neural network architectures of the present disclosure can include a linear bottleneck layer positioned structurally prior to and/or after one or more convolutional layers, such as, for example, one or more depthwise separable convolutional layers. As another example, in some implementations, the neural network architectures of the present disclosure can include one or more inverted residual blocks where the input and output of the inverted residual block are thin bottleneck layers, while an intermediate layer is an expanded representation. For example, the expanded representation can include one or more convolutional layers, such as, for example, one or more depthwise separable convolutional layers. A residual shortcut connection can exist between the thin bottleneck layers that play a role of an input and output of the inverted residual block.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: November 21, 2023
    Assignee: GOOGLE LLC
    Inventors: Andrew Gerald Howard, Mark Sandler, Liang-Chieh Chen, Andrey Zhmoginov, Menglong Zhu
  • Publication number: 20230281824
    Abstract: Methods, systems, and apparatus for generating a panoptic segmentation label for a sensor data sample. In one aspect, a system comprises one or more computers configured to obtain a sensor data sample characterizing a scene in an environment. The one or more computers obtain a 3D bounding box annotation at each time point for a point cloud characterizing the scene at the time point. The one or more computers obtain, for each camera image and each time point, annotation data identifying object instances depicted in the camera image, and the one or more computers generate a panoptic segmentation label for the sensor data sample characterizing the scene in the environment.
    Type: Application
    Filed: March 7, 2023
    Publication date: September 7, 2023
    Inventors: Jieru Mei, Hang Yan, Liang-Chieh Chen, Siyuan Qiao, Yukun Zhu, Alex Zihao Zhu, Xinchen Yan, Henrik Kretzschmar
  • Patent number: 11734545
    Abstract: The present disclosure provides directed to new, more efficient neural network architectures. As one example, in some implementations, the neural network architectures of the present disclosure can include a linear bottleneck layer positioned structurally prior to and/or after one or more convolutional layers, such as, for example, one or more depthwise separable convolutional layers. As another example, in some implementations, the neural network architectures of the present disclosure can include one or more inverted residual blocks where the input and output of the inverted residual block are thin bottleneck layers, while an intermediate layer is an expanded representation. For example, the expanded representation can include one or more convolutional layers, such as, for example, one or more depthwise separable convolutional layers. A residual shortcut connection can exist between the thin bottleneck layers that play a role of an input and output of the inverted residual block.
    Type: Grant
    Filed: February 17, 2018
    Date of Patent: August 22, 2023
    Assignee: GOOGLE LLC
    Inventors: Andrew Gerald Howard, Mark Sandler, Liang-Chieh Chen, Andrey Zhmoginov, Menglong Zhu
  • Publication number: 20210350206
    Abstract: The present disclosure provides directed to new, more efficient neural network architectures. As one example, in some implementations, the neural network architectures of the present disclosure can include a linear bottleneck layer positioned structurally prior to and/or after one or more convolutional layers, such as, for example, one or more depthwise separable convolutional layers. As another example, in some implementations, the neural network architectures of the present disclosure can include one or more inverted residual blocks where the input and output of the inverted residual block are thin bottleneck layers, while an intermediate layer is an expanded representation. For example, the expanded representation can include one or more convolutional layers, such as, for example, one or more depthwise separable convolutional layers. A residual shortcut connection can exist between the thin bottleneck layers that play a role of an input and output of the inverted residual block.
    Type: Application
    Filed: July 22, 2021
    Publication date: November 11, 2021
    Inventors: Andrew Gerald Howard, Mark Sandler, Liang-Chieh Chen, Andrey Zhmoginov, Menglong Zhu
  • Patent number: 11074504
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for instance segmentation. In one aspect, a system generates: (i) data identifying one or more regions of the image, wherein an object is depicted in each region, (ii) for each region, a predicted type of object that is depicted in the region, and (iii) feature channels comprising a plurality of semantic channels and one or more direction channels. The system generates a region descriptor for each of the one or more regions, and provides the region descriptor for each of the one or more regions to a segmentation neural network that processes a region descriptor for a region to generate a predicted segmentation of the predicted type of object depicted in the region.
    Type: Grant
    Filed: November 14, 2018
    Date of Patent: July 27, 2021
    Assignee: Google LLC
    Inventors: Liang-Chieh Chen, Alexander Hermans, Georgios Papandreou, Gerhard Florian Schroff, Peng Wang, Hartwig Adam
  • Publication number: 20210081796
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for determining neural network architectures. One of the methods includes obtaining training data for a dense image prediction task; and determining an architecture for a neural network configured to perform the dense image prediction task, comprising: searching a space of candidate architectures to identify one or more best performing architectures using the training data, wherein each candidate architecture in the space of candidate architectures comprises (i) the same first neural network backbone that is configured to receive an input image and to process the input image to generate a plurality of feature maps and (ii) a different dense prediction cell configured to process the plurality of feature maps and to generate an output for the dense image prediction task; and determining the architecture for the neural network based on the best performing candidate architectures.
    Type: Application
    Filed: November 30, 2020
    Publication date: March 18, 2021
    Inventors: Barret Zoph, Jonathon Shlens, Yukun Zhu, Maxwell Donald Collins, Liang-Chieh Chen, Gerhard Florian Schroff, Hartwig Adam, Georgios Papandreou
  • Patent number: 10853726
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for determining neural network architectures. One of the methods includes obtaining training data for a dense image prediction task; and determining an architecture for a neural network configured to perform the dense image prediction task, comprising: searching a space of candidate architectures to identify one or more best performing architectures using the training data, wherein each candidate architecture in the space of candidate architectures comprises (i) the same first neural network backbone that is configured to receive an input image and to process the input image to generate a plurality of feature maps and (ii) a different dense prediction cell configured to process the plurality of feature maps and to generate an output for the dense image prediction task; and determining the architecture for the neural network based on the best performing candidate architectures.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: December 1, 2020
    Assignee: Google LLC
    Inventors: Barret Zoph, Jonathon Shlens, Yukun Zhu, Maxwell Donald Emmet Collins, Liang-Chieh Chen, Gerhard Florian Schroff, Hartwig Adam, Georgios Papandreou
  • Publication number: 20200175375
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for instance segmentation. In one aspect, a system generates: (i) data identifying one or more regions of the image, wherein an object is depicted in each region, (ii) for each region, a predicted type of object that is depicted in the region, and (iii) feature channels comprising a plurality of semantic channels and one or more direction channels. The system generates a region descriptor for each of the one or more regions, and provides the region descriptor for each of the one or more regions to a segmentation neural network that processes a region descriptor for a region to generate a predicted segmentation of the predicted type of object depicted in the region.
    Type: Application
    Filed: November 14, 2018
    Publication date: June 4, 2020
    Inventors: Liang-Chieh Chen, Alexander Hermans, Georgios Papandreou, Gerhard Florian Schroff, Peng Wang, Hartwig Adam
  • Patent number: 10532991
    Abstract: Provided is a method for preparing hispidulin or a derivative thereof. The method includes selective protection of trihydroxybenzaldehyde, followed by regioselective iodination, selective protection, Stille coupling, Baeyer-Villiger oxidation and basic hydrolysis to obtain a protected intermediate compound. Then, alkylation, Claisen-Schmidt condensation, cyclization and deprotection of the protected intermediate compound are performed to obtain hispidulin or the derivative thereof. The present disclosure provides an efficient method for total synthesis of hispidulin or the derivative thereof with concise reaction steps and high yield.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: January 14, 2020
    Assignee: TAIPEI MEDICAL UNIVERSITY
    Inventors: Wei-Jan Huang, Kai-Cheng Hsu, Lih-Chu Chiou, Liang-Chieh Chen, Hui-Ju Tseng, Pi-Chuan Fan
  • Publication number: 20190370648
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for determining neural network architectures. One of the methods includes obtaining training data for a dense image prediction task; and determining an architecture for a neural network configured to perform the dense image prediction task, comprising: searching a space of candidate architectures to identify one or more best performing architectures using the training data, wherein each candidate architecture in the space of candidate architectures comprises (i) the same first neural network backbone that is configured to receive an input image and to process the input image to generate a plurality of feature maps and (ii) a different dense prediction cell configured to process the plurality of feature maps and to generate an output for the dense image prediction task; and determining the architecture for the neural network based on the best performing candidate architectures.
    Type: Application
    Filed: May 29, 2019
    Publication date: December 5, 2019
    Inventors: Barret Zoph, Jonathon Shlens, Yukun Zhu, Maxwell Donald Emmet Collins, Liang-Chieh Chen, Gerhard Florian Schroff, Hartwig Adam, Georgios Papandreou
  • Publication number: 20190322637
    Abstract: Provided is a method for preparing hispidulin or a derivative thereof. The method includes selective protection of trihydroxybenzaldehyde, followed by regioselective iodination, selective protection, Stille coupling, Baeyer-Villiger oxidation and basic hydrolysis to obtain a protected intermediate compound. Then, alkylation, Claisen-Schmidt condensation, cyclization and deprotection of the protected intermediate compound are performed to obtain hispidulin or the derivative thereof. The present disclosure provides an efficient method for total synthesis of hispidulin or the derivative thereof with concise reaction steps and high yield.
    Type: Application
    Filed: November 1, 2018
    Publication date: October 24, 2019
    Inventors: Wei-Jan Huang, Kai-Cheng Hsu, Lih-Chu Chiou, Liang-Chieh Chen, Hui-Ju Tseng, Pi-Chuan Fan
  • Publication number: 20190147318
    Abstract: The present disclosure provides directed to new, more efficient neural network architectures. As one example, in some implementations, the neural network architectures of the present disclosure can include a linear bottleneck layer positioned structurally prior to and/or after one or more convolutional layers, such as, for example, one or more depthwise separable convolutional layers. As another example, in some implementations, the neural network architectures of the present disclosure can include one or more inverted residual blocks where the input and output of the inverted residual block are thin bottleneck layers, while an intermediate layer is an expanded representation. For example, the expanded representation can include one or more convolutional layers, such as, for example, one or more depthwise separable convolutional layers. A residual shortcut connection can exist between the thin bottleneck layers that play a role of an input and output of the inverted residual block.
    Type: Application
    Filed: February 17, 2018
    Publication date: May 16, 2019
    Inventors: Andrew Gerald Howard, Mark Sandler, Liang-Chieh Chen, Andrey Zhmoginov, Menglong Zhu
  • Patent number: 8223545
    Abstract: Embodiments of the present disclosure provide methods and apparatus for providing a NAND flash memory arrangement that comprises a source select line (SSL), a drain select line (DSL) and a plurality of NAND memory cells arranged to provide a plurality of data pages. The method further includes defining a first set of data pages in close proximity to the SSL, defining a second set of data pages in close proximity to the DSL, and differentiating the first set of data pages and the second set of data pages from at least the remaining data pages.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: July 17, 2012
    Assignee: Marvell International Ltd.
    Inventors: Liang-Chieh Chen, Xueshi Yang
  • Patent number: 8044829
    Abstract: The present disclosure includes apparatus, systems and techniques relating to lossless data compression. In some implementations, an apparatus includes a memory module to store data. The memory module includes a first buffer portion to store encoded symbols of the data, and a second buffer portion to store symbols of the data to be encoded. The apparatus includes an encoder to compare the symbols stored in the second buffer portion with the encoded symbols stored in the first buffer portion and to compress the data. The encoder can operate in a first encoding mode to encode the symbols in the second buffer portion with corresponding codewords until detecting a repeated pattern of symbols in the second buffer portion that matches the encoded symbols in the first buffer portion. The encoder can operate in a second encoding mode responsive to detecting the repeated pattern.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: October 25, 2011
    Assignee: Marvell World Trade Ltd.
    Inventors: Liang-Chieh Chen, Xueshi Yang
  • Publication number: 20100225506
    Abstract: The present disclosure includes apparatus, systems and techniques relating to lossless data compression. In some implementations, an apparatus includes a memory module to store data. The memory module includes a first buffer portion to store encoded symbols of the data, and a second buffer portion to store symbols of the data to be encoded. The apparatus includes an encoder to compare the symbols stored in the second buffer portion with the encoded symbols stored in the first buffer portion and to compress the data. The encoder can operate in a first encoding mode to encode the symbols in the second buffer portion with corresponding codewords until detecting a repeated pattern of symbols in the second buffer portion that matches the encoded symbols in the first buffer portion. The encoder can operate in a second encoding mode responsive to detecting the repeated pattern.
    Type: Application
    Filed: February 26, 2010
    Publication date: September 9, 2010
    Inventors: Liang-Chieh Chen, Xueshi Yang