Patents by Inventor Liang-Feng SHEN

Liang-Feng SHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11950432
    Abstract: A semiconductor package includes a first semiconductor device and a second semiconductor device. The first semiconductor device includes a first semiconductor substrate, a first bonding structure and a memory cell. The second semiconductor device is stacked over the first semiconductor device. The second semiconductor device includes a second semiconductor substrate, a second bonding structure in a second dielectric layer and a peripheral circuit between the second semiconductor substrate and the second bonding structure. The first bonding structure and the second bonding structure are bonded and disposed between the memory cell and the peripheral circuit, and the memory cell and the peripheral circuit are electrically connected through the first bonding structure and the second bonding structure.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsiang-Ku Shen, Ku-Feng Lin, Liang-Wei Wang, Dian-Hau Chen
  • Patent number: 10804176
    Abstract: A low stress moisture resistant structure of semiconductor device comprises a low stress moisture resistant layer, wherein a semiconductor device is formed on a semiconductor wafer, the semiconductor device comprises at least one pad, the low stress moisture resistant layer is coated on the semiconductor device and the semiconductor wafer so that a pad top center surface of the pad is exposed. The low stress moisture resistant layer comprises a material comprising crosslinked fluoropolymer. A before-coated stress measured on the semiconductor wafer before the low stress moisture resistant layer is coated and an after-cured stress measured on the semiconductor wafer after the low stress moisture resistant layer is coated and cured define a stress difference, the stress difference is greater than or equal to ?5×107 dyne/cm2 and less than or equal to 5×107 dyne/cm2.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: October 13, 2020
    Assignees: WIN Semiconductors Corp., The Chemours Company FC, LLC
    Inventors: Ray Chen, Xudong Chen, Shih-Hui Huang, Liang-Feng Shen, Gin Tsai, Walter Tony Wohlmuth
  • Publication number: 20200273764
    Abstract: A low stress moisture resistant structure of semiconductor device comprises a low stress moisture resistant layer, wherein a semiconductor device is formed on a semiconductor wafer, the semiconductor device comprises at least one pad, the low stress moisture resistant layer is coated on the semiconductor device and the semiconductor wafer so that a pad top center surface of the pad is exposed. The low stress moisture resistant layer comprises a material comprising crosslinked fluoropolymer. A before-coated stress measured on the semiconductor wafer before the low stress moisture resistant layer is coated and an after-cured stress measured on the semiconductor wafer after the low stress moisture resistant layer is coated and cured define a stress difference, the stress difference is greater than or equal to ?5×107 dyne/cm2 and less than or equal to 5×107 dyne/cm2.
    Type: Application
    Filed: February 21, 2019
    Publication date: August 27, 2020
    Inventors: Ray CHEN, Xudong CHEN, Shih-Hui HUANG, Liang-Feng SHEN, Gin TSAI, Walter Tony WOHLMUTH