Abstract: A touch panel includes a touch sensor layer including a first transparent electrode and a second transparent electrode, wherein an arrangement direction of the first transparent electrode can be perpendicular to that of the second transparent electrode, and both of the first and second transparent electrodes include two transparent metallic patterns which are stacked and electrically connected to each other.

Abstract: A touch panel includes a touch sensor layer including a first transparent electrode and a second transparent electrode, wherein an arrangement direction of the first transparent electrode can be perpendicular to that of the second transparent electrode, and both of the first and second transparent electrodes include two transparent metallic patterns which are stacked and electrically connected to each other.

Abstract: A touch panel includes a touch sensor layer including a first transparent electrode and a second transparent electrode, wherein an arrangement direction of the first transparent electrode can be perpendicular to that of the second transparent electrode, and both of the first and second transparent electrodes include two transparent metallic patterns which are stacked and electrically connected to each other.

Abstract: A wiring structure of a liquid crystal display (LCD) panel is provided. The wiring structure includes: a gate electrode layer, formed on a glass substrate; a first insulating layer, covering the glass substrate and partially formed on the gate electrode layer, such that at least one first opening is defined on the gate electrode layer; a source/drain electrode layer, formed on the first insulating layer, in which the source/drain electrode layer and the gate electrode layer are horizontally staggered; a second insulating layer, partially formed on the source/drain electrode layer, and defining at least one second opening on the source/drain electrode layer; and an indium tin oxide (ITO) layer, formed on the first opening, the second opening, and/or the second insulating layer. Thus, the high impedance of the ITO layer for connecting the gate electrode layer with the source/drain electrode layer is reduced.

Abstract: A pixel array substrate includes a pixel region and a circuit region adjacent to the pixel region. A plurality of display pixel units are disposed in the pixel region and a plurality of dummy pixel units are disposed in the circuit region. Each of the dummy pixel units includes a data line, a scan line, a plurality of switching elements and a plurality of pixel electrodes. The switching elements are electrically connected to the scan line and data line. The pixel electrodes are electrically connected to the switching elements. Particularly, electrostatic currents in the pixel region can be dissipated by the dummy pixel units in the circuit region. The dummy pixel units preserve the continuity of electricity in the pixel array substrate and function as an inner short ring. Therefore, the area of the circuit region on the pixel array substrate is larger.

Abstract: A pixel array substrate includes a pixel region and a circuit region adjacent to the pixel region. A plurality of display pixel units are disposed in the pixel region and a plurality of dummy pixel units are disposed in the circuit region. Each of the dummy pixel units includes a data line, a scan line, a plurality of switching elements and a plurality of pixel electrodes. The switching elements are electrically connected to the scan line and data line. The pixel electrodes are electrically connected to the switching elements. Particularly, electrostatic currents in the pixel region can be dissipated by the dummy pixel units in the circuit region. The dummy pixel units preserve the continuity of electricity in the pixel array substrate and function as an inner short ring. Therefore, the area of the circuit region on the pixel array substrate is larger.

Abstract: A pixel array substrate includes a pixel region and a circuit region adjacent to the pixel region. A plurality of display pixel units are disposed in the pixel region and a plurality of dummy pixel units are disposed in the circuit region. Each of the dummy pixel units includes a data line, a scan line, a plurality of switching elements and a plurality of pixel electrodes. The switching elements are electrically connected to the scan line and data line. The pixel electrodes are electrically connected to the switching elements. Particularly, electrostatic currents in the pixel region can be dissipated by the dummy pixel units in the circuit region. The dummy pixel units preserve the continuity of electricity in the pixel array substrate and function as an inner short ring. Therefore, the area of the circuit region on the pixel array substrate is larger.

Abstract: A pixel array substrate includes a pixel region and a circuit region adjacent to the pixel region. A plurality of display pixel units are disposed in the pixel region and a plurality of dummy pixel units are disposed in the circuit region. Each of the dummy pixel units includes a data line, a scan line, a plurality of switching elements and a plurality of pixel electrodes. The switching elements are electrically connected to the scan line and data line. The pixel electrodes are electrically connected to the switching elements. Particularly, electrostatic currents in the pixel region can be dissipated by the dummy pixel units in the circuit region. The dummy pixel units preserve the continuity of electricity in the pixel array substrate and function as an inner short ring. Therefore, the area of the circuit region on the pixel array substrate is larger.

Abstract: A substrate module suitable for being filled with a display medium to form a display panel is provided. The substrate module includes an active device array substrate, an opposite substrate, and a sealant. The active device array substrate has a groove. The opposite substrate is disposed opposite to the active device array substrate. The active device array substrate and the opposite substrate are assembled through the sealant, wherein the display medium is substantially filled in a region surrounded by the sealant to form the display panel and the groove is located between the sealant and a border of the active device array substrate.

Abstract: A substrate module suitable for being filled with a display medium to form a display panel is provided. The substrate module includes an active device array substrate, an opposite substrate, and a sealant. The active device array substrate has a groove. The opposite substrate is disposed opposite to the active device array substrate. The active device array substrate and the opposite substrate are assembled through the sealant, wherein the display medium is substantially filled in a region surrounded by the sealant to form the display panel and the groove is located between the sealant and a border of the active device array substrate.

Abstract: A wiring structure of a liquid crystal display (LCD) panel is provided. The wiring structure includes: a gate electrode layer, formed on a glass substrate; a first insulating layer, covering the glass substrate and partially formed on the gate electrode layer, such that at least one first opening is defined on the gate electrode layer; a source/drain electrode layer, formed on the first insulating layer, in which the source/drain electrode layer and the gate electrode layer are horizontally staggered; a second insulating layer, partially formed on the source/drain electrode layer, and defining at least one second opening on the source/drain electrode layer; and an indium tin oxide (ITO) layer, formed on the first opening, the second opening, and/or the second insulating layer. Thus, the high impedance of the ITO layer for connecting the gate electrode layer with the source/drain electrode layer is reduced.

Abstract: An LCD panel includes a panel area, a plurality of shorting bars, a plurality of panel test pads, and a plurality of array test pads. The panel area includes a plurality of scan lines and a plurality of data lines. The plurality of shorting bars is located inside the panel area. The plurality of scan lines and the plurality of data lines are electrically connected to corresponding shorting bars of the plurality of shorting bars through a switch circuit. The plurality of panel test pads is located inside the panel area. The plurality of panel test pads is electrically connected to the plurality of shorting bars respectively. The plurality of array test pads is located outside the panel area. The plurality of array test pads is electrically connected to corresponding panel test pads of the plurality of panel test pads.

Abstract: A pixel array substrate includes a pixel region and a circuit region adjacent to the pixel region. A plurality of display pixel units are disposed in the pixel region and a plurality of dummy pixel units are disposed in the circuit region. Each of the dummy pixel units includes a data line, a scan line, a plurality of switching elements and a plurality of pixel electrodes. The switching elements are electrically connected to the scan line and data line. The pixel electrodes are electrically connected to the switching elements. Particularly, electrostatic currents in the pixel region can be dissipated by the dummy pixel units in the circuit region. The dummy pixel units preserve the continuity of electricity in the pixel array substrate and function as an inner short ring. Therefore, the area of the circuit region on the pixel array substrate is larger.