Abstract: A clock-generating circuit is provided, which includes a voltage-reference circuit, a tracking-voltage-generating circuit, a voltage regulator, an oscillation generator, and a level shifter. The voltage-reference circuit and the tracking-voltage-generating circuit respectively convert the external voltage into a reference voltage and a temporary reference voltage. The voltage regulator receives the reference voltage and the temporary reference voltage, and it converts the reference voltage or the temporary reference voltage into an oscillation power-supply voltage. The oscillation generator generates a first clock signal according to the oscillation power-supply voltage. The level shifter converts a voltage amplitude of the first clock signal to generate a second clock signal that is output by the clock-generating circuit.

Abstract: A clock-generating circuit is provided, which includes a voltage-reference circuit, a tracking-voltage-generating circuit, a voltage regulator, an oscillation generator, and a level shifter. The voltage-reference circuit and the tracking-voltage-generating circuit respectively convert the external voltage into a reference voltage and a temporary reference voltage. The voltage regulator receives the reference voltage and the temporary reference voltage, and it converts the reference voltage or the temporary reference voltage into an oscillation power-supply voltage. The oscillation generator generates a first clock signal according to the oscillation power-supply voltage. The level shifter converts a voltage amplitude of the first clock signal to generate a second clock signal that is output by the clock-generating circuit.

Abstract: A peripheral circuit of a memory device includes a compensation circuit, a determination circuit, and a plurality of page buffers. The compensation circuit defines a leakage current. The determination circuit is coupled to the compensation circuit, and is operated according to the leakage current. The determination circuit includes a current source, a first current mirror, a second current mirror, a potentially-qualified-bit quantity control unit, a determination circuit enable control unit, a hysteresis circuit, and a first logic unit. The page buffers include an unselected page buffer and a selected page buffer. The unselected page buffer is coupled to the compensation circuit. The selected page buffer is coupled to the determination circuit.

Abstract: A control device and a memory system are provided. The control device includes a first peripheral circuit group and a second peripheral circuit group. The first peripheral circuit group and a memory array are driven by a first voltage in a standby mode. The first peripheral circuit group provides a control command when recognizing that a command string is a deep power-down (DPD) execution command string. When receiving the control command, the second peripheral circuit group provides a DPD signal having a first logic value to stop providing the first voltage so that the memory system enters a DPD mode. In the DPD mode, when recognizing that the command string is a DPD exit command string, the second peripheral circuit group provides a DPD signal having a second logic value to provide the first voltage so that the memory system enters standby mode.

Abstract: A control device and a memory system are provided. The control device includes a first peripheral circuit group and a second peripheral circuit group. The first peripheral circuit group and a memory array are driven by a first voltage in a standby mode. The first peripheral circuit group provides a control command when recognizing that a command string is a deep power-down (DPD) execution command string. When receiving the control command, the second peripheral circuit group provides a DPD signal having a first logic value to stop providing the first voltage so that the memory system enters a DPD mode. In the DPD mode, when recognizing that the command string is a DPD exit command string, the second peripheral circuit group provides a DPD signal having a second logic value to provide the first voltage so that the memory system enters standby mode.

Abstract: The present invention discloses a bootstrap DC-DC converter. The bootstrap DC-DC converter includes a lower gate driver, for generating a lower gate control signal according to a control signal; a lower gate, for turning on and turning off according to a lower gate control signal; and a bootstrap voltage maintaining circuit, for generating the control signal, such that the lower gate turns on at least a minimum off time each time.

Abstract: A control module of constant on-time mode for a voltage converting device, includes a comparing unit, for generating a comparing signal according to an enhanced feedback voltage and a comparing voltage; a feedback voltage generating unit, for generating the enhanced feedback voltage according to a voltage difference between a first reference voltage and a feedback voltage corresponding to an output voltage of the voltage converting device; a comparing voltage generating unit, for generating the comparing voltage according to a second reference voltage and a control signal; and a adjusting unit, for acquiring an average voltage of the enhanced feedback voltage and adjusting the first reference voltage according to a voltage difference between the average voltage and the second reference voltage.

Abstract: A control module of constant on-time mode for a voltage converting device, includes a comparing unit, for generating a comparing signal according to an enhanced feedback voltage and a comparing voltage; a feedback voltage generating unit, for generating the enhanced feedback voltage according to a voltage difference between a first reference voltage and a feedback voltage corresponding to an output voltage of the voltage converting device; a comparing voltage generating unit, for generating the comparing voltage according to a second reference voltage and a control signal; and a adjusting unit, for acquiring an average voltage of the enhanced feedback voltage and adjusting the first reference voltage according to a voltage difference between the average voltage and the second reference voltage.

Abstract: The present disclosure provides a light emitting element drive device for driving a plurality of LED strings. The device comprises a power supply circuit, a plurality of current sources, a plurality of error amplifiers, a plurality of first diodes and a control circuit. The power supply circuit provides a driving voltage to each of the LED strings. The inverted input terminal of each error amplifier is coupled to a second terminal of the corresponding LED string. Each error amplifier output the voltage difference between the second terminal of the corresponding LED string and a first reference voltage. The anode of each first diode is coupled to the output terminal of the corresponding error amplifier, and the cathodes of the diodes are coupled to each other. The control circuit adjusts the driving voltage of the power supply circuit according to the cathode voltage of the conducted first diode.

Abstract: The present invention discloses an on-time control module for compensating a switching frequency in a switching regulator. The on-time control module includes an average voltage generating circuit, for generating an average voltage related to a duty according to an input voltage and the duty, and an on-time controller, for generating a control signal of an on-time related to the duty according to the input voltage and the duty voltage.

Abstract: The present invention discloses a bootstrap DC-DC converter. The bootstrap DC-DC converter includes a lower gate driver, for generating a lower gate control signal according to a control signal; a lower gate, for turning on and turning off according to a lower gate control signal; and a bootstrap voltage maintaining circuit, for generating the control signal, such that the lower gate turns on at least a minimum off time each time.

Abstract: A buck converter with internal ripple compensation includes a comparator for generating a comparison result, a constant-on-time trigger coupled to the comparator for generating a trigger control signal according to the comparison result, a pre-driver coupled to the constant-on-time trigger for controlling a high side switch and a low side switch, an output module coupled to a first node and a signal output end, and a ripple compensation circuit coupled to the high side switch, the low side switch, the first node, and the comparator for generating a compensation signal outputted to the comparator.

Abstract: The present invention discloses an on-time control module for compensating a switching frequency in a switching regulator. The on-time control module includes an average voltage generating circuit, for generating an average voltage related to a duty according to an input voltage and the duty, and an on-time controller, for generating a control signal of an on-time related to the duty according to the input voltage and the duty voltage.

Abstract: A buck converter with internal ripple compensation includes a comparator for generating a comparison result, a constant-on-time trigger coupled to the comparator for generating a trigger control signal according to the comparison result, a pre-driver coupled to the constant-on-time trigger for controlling a high side switch and a low side switch, an output module coupled to a first node and a signal output end, and a ripple compensation circuit coupled to the high side switch, the low side switch, the first node, and the comparator for generating a compensation signal outputted to the comparator.

Abstract: A charge pump circuit has an input stage, an output stage and multiple boosting stages coupled between the input stage and the output stage. The boosting stages are driven by four phase clock signals. Each boosting stage has two branch charge pumps, wherein each branch charge pump at least has a main pass transistor, a pre-charge transistor, two substrate transistors and capacitors. The substrate transistors and the main pass transistor are operated in association with the four phase clock signals to keep a potential of the body of the main pass transistors at a low level thus mitigating the body effect.

Abstract: A charge pump circuit has an input stage, an output stage and multiple boosting stages coupled between the input stage and the output stage. The boosting stages are driven by four phase clock signals. Each boosting stage has two branch charge pumps, wherein each branch charge pump at least has a main pass transistor, a pre-charge transistor, two substrate transistors and capacitors. The substrate transistors and the main pass transistor are operated in association with the four phase clock signals to keep a potential of the body of the main pass transistors at a low level thus mitigating the body effect.