Abstract: This application discloses an antenna system, including a plurality of antenna groups. Each antenna group includes two antenna array planes and one mounting panel. The two antenna array planes are symmetrically mounted on two planes of the mounting panel. Each antenna array plane includes at least one antenna element. The two antenna array planes in each antenna group work simultaneously. The antenna system includes a plurality of radiation areas, and each radiation area is formed by cooperative radiation of beams from a plurality of antenna array planes in different antenna groups. In this application, more antenna array planes can be deployed in the antenna system. Therefore, overall coverage of the antenna system is improved without additional wind resistance. In addition, each radiation area is formed by cooperative radiation of a plurality of antenna array planes. Therefore, a capacity and a gain of the antenna system are also improved.

Abstract: In addition to word line related short circuits within the blocks of the array structure of a non-volatile memory device, such as NAND memory, word line related shorts can also occur in the routing for supplying the word lines of the memory blocks. Depending on the layout of the routing, some shorts for the word lines associated with one block can affect other blocks of the memory array. In particular, if the routing of a pair of adjacent local supply lines are adjacent to a global supply line, a short between the pair of adjacent local supply lines for one block can lead, through the global supply line, to defects in another of the block. Techniques are presented for detecting these layout related problematic word lines.

Abstract: An apparatus is described. The apparatus includes a packaged semiconductor device. The packaged semiconductor device having an integrated heat spreader, wherein, a boiling enhancement structure exists on the integrated heat spreader without a block mass residing between the boiling enhancement structure and the integrated heat spreader. The boiling enhancement structure has a structured non-planar surface to promote bubble nucleation in an immersion cooling system.

Abstract: A display frame includes a front frame, a back panel, a middle frame in the front frame, and an elastic pad between the top surface of a side wall of the middle frame facing the front edge and the front edge. The front frame includes a frame structure and a front edge located at one end of the frame structure and extending towards the center of the frame structure. Opposite side walls of the frame structure have a first snap part. The back plate includes a bottom plate and a side plate located on the side edge of the bottom plate and extending towards one side of the bottom plate. The inner surface of the bottom plate is opposite to the inner surface of the front edge. The side plate has a second snap part for fitting with the first snap part.

Abstract: A semiconductor structure and method for fabricating it are disclosed. The method includes: providing a semiconductor substrate including a BOX layer, at least one fin structure, a DTC, an isolation layer and an HARP layer, the semiconductor substrate divided into a fin structure region and a DT region; thinning the HARP layer, with the remaining portion of the HARP layer being retained above the BOX layer; removing the isolation layer and the HARP layer from the fin structure region; forming a first oxide layer over the semiconductor substrate; and forming layer-stacked structures and sidewall spacers. According to the present invention, the thinned HARP layer being retained above the BOX layer and is subsequently removed only from the fin structure region.

Abstract: There is provided a phase shifter including a first substrate, a second substrate and a dielectric layer between the first substrate and the second substrate, the first substrate includes a first base and a first electrode layer on a side, of the first base, the second substrate includes a second base, a second electrode layer and a reference voltage leading-in end on a side of the second base, the reference voltage leading-in end is coupled to the second electrode layer, one of the first electrode layer and the second electrode layer includes a body structure and branch structures; an orthographic projection of an end of each branch structure away from the body structure on the first base is overlapped with an orthographic projection of the second electrode layer or the first electrode layer on the first base. An antenna is further provided.

Abstract: This application provides a data sharing method, including: A first data management system receives a first query statement; obtains, based on the first query statement, a second query statement by using a software development kit of a second data management system; and then accesses a unified open access service of the second data management system based on the second query statement, to obtain proprietary-format data in the second data management system. In the method, a data management system may provide a software development kit SDK to the outside, such that another data management system such as a big data engine can access a unified open access service by invoking the SDK, so as to support sharing of proprietary-format data with the outside, breaking a limitation that proprietary-format data is shared only within a system, and improving usability.

Abstract: An azimuth ambiguity suppression method for a spaceborne SAR in spatially non-uniform sampling relates to the technical field of radars. The method includes the following steps: step 1: compensating for a phase difference between the channels according to the locations of transmitting and receiving stations for channel echoes; step 2: calculating an equivalent azimuth sampling location of each channel at the moment of each pulse transmission; step 3: sorting the equivalent azimuth sampling locations of all channels and their corresponding echoes after the phase difference between the channels is compensated in ascending order; and step 4: calculating reconstructed echoes from the sorted equivalent azimuth sampling locations and corresponding echoes after the phase difference between the channels is compensated, by using an adaptive weight-conjugate gradient-Toeplitz matrix (ACT) algorithm.

Abstract: The memory device that includes a die with a CMOS wafer with programming and erasing circuitry. The die also includes a plurality of array wafers coupled with and in electrical communication with the CMOS wafer and having different programming and erasing efficiencies. Each of the array wafers includes memory blocks with memory cells. The control circuitry of the CMOS wafer is configured to output at least one of different initial programming voltages and unique erase voltages to the plurality of array wafers.

Abstract: A stack of alternating layers of dielectric and conductive materials are formed on a substrate. A first portion of the stack of alternating layers forms a plurality of blocks of NAND memory. A second portion of the stack of alternating layers forms a configurable capacitor structure. The configurable capacitor structure is configurable to form one or more capacitors of configurable capacitance.

Abstract: An apparatus, having a server and processor, is configured to receive a first set of security rules applicable to a set of users or a set of files for a first period of time. The first set of security rules are executable in an order of priority. The processor receives an interim security policy that is different from the first set of security rules. The interim security policy is applicable to a subset of the set of users for a second period of time that is less than the first period, or a subset of the set of files for a second period of time that is less than the first period. The processor determines, in the first set of security rules, an insertion point among the order of priority. The processor executes, at the insertion point and in the first set of security rules, the interim security policy.

Abstract: An eDRAM and a method for making it are disclosed. In the method, a pad oxide layer and a pad nitride layer are removed after an active area and a deep trench filled with polysilicon are formed, followed by the formation of a re-deposited oxide layer and a re-deposited nitride layer. The re-deposited nitride layer has greater uniformity than the pad nitride layer that has undergone the formation of the deep trench. An isolation recess is then formed at one side of the deep trench and then filled with a first isolation dielectric. In this process, the re-deposited nitride layer can be utilized to control the height and flatness of a top surface of the isolation dielectric. After that, an upper polysilicon recess between a first active sub-region and the first isolation dielectric is filled with a second isolation dielectric.

Abstract: A multi-threshold voltage semiconductor device and a method for fabricating the device are disclosed, in which a first metal material layer is formed on exposed dielectric layer in a part of gate trenches, and an annealing process is then carried out to cause diffusion of metal ions from the first metal material layer into the corresponding portion(s) of the high-k dielectric layer. In this way, two different threshold voltages can be achieved simply with one photolithography process and one etching process. More different threshold voltages can be achieved by adding photolithography processes. As fewer photolithography and etching processes are involved, the multi-threshold voltage semiconductor device can be fabricated at lower cost and exhibits improved consistency.

Abstract: An eDRAM and a method for making it are disclosed. In the method, a pad oxide layer and a pad nitride layer formed over a surface of a substrate are removed after an active area and a deep trench filled with polysilicon are formed, followed by the formation of a re-deposited oxide layer and a re-deposited nitride layer. The re-deposited nitride layer has greater uniformity than the pad nitride layer that has undergone the formation of the deep trench. An isolation recess and a recess extension are then formed at one side of the deep trench and then filled with an isolation dielectric. In this process, the re-deposited nitride layer can be utilized to control the height and flatness of a top surface of the isolation dielectric, thus ensuring effective isolation of the polysilicon from a word line.

Abstract: The main driver information acquisition-based vehicle control system comprises a first ECU, a vehicle-mounted storage battery, a second ECU separately connected to the first ECU and the vehicle-mounted storage battery, and a microphone connected to the second ECU. The microphone is embedded on a door handle on one side of the driving position, and is used for obtaining voiceprint information. The second ECU is used for comparing the voiceprint information with a pre-entered voiceprint sample of a main driver, determining whether the voiceprint information is the main driver's, monitoring the electronic start status of a vehicle when the voiceprint information is the main driver's, and notifying the first ECU to control, according to preference information of the main driver, a device corresponding to the preference information of the main driver when monitoring that the vehicle enters an ACC or one-button start mode.

Abstract: An inspection system includes a conveying mechanism, a pushing mechanism, a positioning mechanism and an inspection mechanism. The conveying mechanism is configured to convey an object to be inspected. The pushing mechanism is suitable for pushing the object to be inspected in a conveying direction of the conveying mechanism, so as to push the object to be inspected to a first positioning plane and a second positioning plane. The positioning mechanism includes a positioning portion. The positioning portion may move in the conveying direction of the conveying mechanism, so as to define the first positioning plane and the second positioning plane. The object to be inspected abuts against the positioning portion on the first positioning plane and the second positioning plane. The inspection mechanism is suitable for inspecting the object to be inspected when the object to be inspected is located on the first positioning plane and the second positioning plane.

Abstract: The present disclosure provides a CT imaging system and a CT detection device. The CT imaging system includes: a connecting plate, a strong supporting frame, a weak supporting frame, an emitter, a detector, an electrical component and a shielding box. The connecting plate is annular and has a rotating axis. The strong supporting frame is connected to the connecting plate on a side of the connecting plate and includes a first strong supporting frame and a second strong supporting frame distributed at an interval in a circumferential direction of the connecting plate. The weak supporting frame is connected to the connecting plate on a same side of the connecting plate as the strong supporting frame. The emitter is connected to the first strong supporting frame. The detector is connected to the second strong supporting frame. The electrical component is connected to the weak supporting frame. The shielding box is connected to at least one weak supporting frame.

Abstract: A rotating shaft assembly, including a shaft sleeve which has an inner cavity, a second shaft, and a flexible circuit board. A part of the second shaft is located in the inner cavity and is rotatably connected to the shaft sleeve, and the other part of the second shaft is located outside the inner cavity. The flexible circuit board includes a first electrical connection end and a second electrical connection end located outside the inner cavity, a mounting part located between the first electrical connection end and the second electrical connection end, which includes a wound part and a laminated part that are connected, the wound part is wound around the part that is of the second shaft and located in the inner cavity, the laminated part is in a folded state, and at least a part of the laminated part is accommodated in a channel of the second shaft.

Abstract: Provided are a CT scanning method and system, an electronic device, and a computer-readable storage medium. The method includes: determining a first coordinate of a mark point of a part to be imaged in a dual-camera coordinate system; converting the first coordinate into a second coordinate of the mark point in a CT coordinate system according to coordinate system transformation parameters; generating first locating information according to the second coordinate to drive a scanning table to move to a first location designated by the first locating information; obtaining projection images of the part to be scanned; determining second locating information and scanning information of the part to be scanned according to the projection images; and driving the scanning table to move to a second location designated by the second locating information according to the second locating information and performing CT scanning according to the scanning information.

Abstract: A motor malfunction monitoring device for monitoring a malfunction of a drive motor, includes: vibration sensors for detecting for one or more components of the drive motor transverse vibration in a direction parallel to a mounting plane of the drive motor and perpendicular to a longitudinal direction of the drive motor or longitudinal vibration in a direction perpendicular to both the mounting plane and the longitudinal direction of the drive motor; a voltage sensor for detecting a voltage of the drive motor or a current sensor for detecting a current of the drive motor; and a data storage storing a database of normal operation spectrums of one of the transverse vibration or the longitudinal vibration during a normal operation of the drive motor, and of one of the voltage or the current during a normal operation of the drive motor.