Patents by Inventor Liang-Wei Chen

Liang-Wei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240164043
    Abstract: A swivel bracket assembly and a method for installing an electrical component to a riser bracket assembly are disclosed. The swivel bracket assembly includes a baseplate; a swivel bracket rotatably attached to the baseplate, the swivel bracket being rotatable between an open position and a closed position; and pads attached to the swivel bracket, at least one of the pads being configured to contact and support the electrical component attached to the riser bracket assembly when the swivel bracket is in the closed position. A method for installing an electrical component to a riser bracket assembly includes receiving the electrical component into a slot of a riser circuit board and pivoting a swivel bracket rotatable coupled to a baseplate from an open position to a closed position to support the electrical component secured to the riser bracket assembly.
    Type: Application
    Filed: November 14, 2022
    Publication date: May 16, 2024
    Inventors: Yaw-Tzorng TSORNG, Ming-Lung WANG, Hung-Wei CHEN, Liang-Ju LIN
  • Publication number: 20240160828
    Abstract: A method of generating an IC layout diagram includes receiving an IC layout diagram including a gate region and a gate via, the gate via being positioned at a location within an active region and along a width of the gate region extending across the active region, receiving a first gate resistance value of the gate region, retrieving a second gate resistance value from a resistance value reference based on the location and the width, using the first and second resistance values to determine that the IC layout diagram does not comply with a design specification, and based on the non-compliance with the design specification, modifying the IC layout diagram.
    Type: Application
    Filed: January 24, 2024
    Publication date: May 16, 2024
    Inventors: Ke-Ying SU, Jon-Hsu HO, Ke-Wei SU, Liang-Yi CHEN, Wen-Hsing HSIEH, Wen-Koi LAI, Keng-Hua KUO, KuoPei LU, Lester CHANG, Ze-Ming WU
  • Publication number: 20240145344
    Abstract: A via structure, a semiconductor structure, and methods for forming the via structure and the semiconductor structure are presented. A via structure includes a first conductive portion through an interconnect structure, a second conductive portion through a substrate and in contact with the first conductive portion, and a liner layer. The liner layer is between the first conductive portion and the interconnect structure, and between the second conductive portion and the substrate. The liner layer includes a portion extending parallel to a surface of the substrate.
    Type: Application
    Filed: February 22, 2023
    Publication date: May 2, 2024
    Inventors: Tsung-Chieh Hsiao, Liang-Wei Wang, Dian-Hau Chen
  • Publication number: 20240145435
    Abstract: Some implementations described herein include systems and techniques for fabricating a multi-dimension through silicon via structure in a three-dimensional integrated circuit device. The multi-dimension through silicon via structure includes a first columnar structure having a first width and a second columnar structure including a second width that is greater relative to the first width. The first columnar structure may include a low electrical capacitance and be configured for electrical signaling within the three-dimensional integrated circuit device. The second columnar structure may be configured to provide power to integrated circuitry of the three-dimensional integrated circuit device and also be configured to conduct heat through the three-dimensional integrated circuit device for thermal management of the three-dimensional integrated circuit device. Additionally, a pattern including the second columnar structure may be used for alignment purposes.
    Type: Application
    Filed: April 26, 2023
    Publication date: May 2, 2024
    Inventors: Ke-Gang WEN, Tsung-Chieh HSIAO, Liang-Wei WANG, Dian-Hau CHEN
  • Publication number: 20240120257
    Abstract: An integrated circuit (IC) device includes a substrate. The IC device includes a multi-layer interconnect structure disposed over a first side of the substrate. The multi-layer interconnect structure includes a plurality of metal layers. The IC device includes a first portion of a through-substrate via (TSV) disposed over the first side of the substrate. The first portion of the TSV includes a plurality of conductive components belonging to the plurality of metal layers of the multi-layer interconnect structure. The IC device includes a second portion of the TSV that extends vertically through the substrate from the first side to a second side opposite the first side. The second portion of the TSV is electrically coupled to the first portion of the TSV.
    Type: Application
    Filed: March 30, 2023
    Publication date: April 11, 2024
    Inventors: Tsung-Chieh Hsiao, Ke-Gang Wen, Liang-Wei Wang, Dian-Hau Chen
  • Patent number: 11950432
    Abstract: A semiconductor package includes a first semiconductor device and a second semiconductor device. The first semiconductor device includes a first semiconductor substrate, a first bonding structure and a memory cell. The second semiconductor device is stacked over the first semiconductor device. The second semiconductor device includes a second semiconductor substrate, a second bonding structure in a second dielectric layer and a peripheral circuit between the second semiconductor substrate and the second bonding structure. The first bonding structure and the second bonding structure are bonded and disposed between the memory cell and the peripheral circuit, and the memory cell and the peripheral circuit are electrically connected through the first bonding structure and the second bonding structure.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsiang-Ku Shen, Ku-Feng Lin, Liang-Wei Wang, Dian-Hau Chen
  • Publication number: 20240069299
    Abstract: An optical element driving mechanism includes a movable assembly, a fixed assembly, and a driving assembly. The movable assembly is configured to be connected to an optical element. The movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly in a range of motion. The optical element driving mechanism further includes a positioning assembly configured to position the movable assembly at a predetermined position relative to the fixed assembly when the driving assembly is not operating.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Inventors: Chao-Chang HU, Kuen-Wang TSAI, Liang-Ting HO, Chao-Hsi WANG, Chih-Wei WENG, He-Ling CHANG, Che-Wei CHANG, Sheng-Zong CHEN, Ko-Lun CHAO, Min-Hsiu TSAI, Shu-Shan CHEN, Jungsuck RYOO, Mao-Kuo HSU, Guan-Yu SU
  • Publication number: 20210289661
    Abstract: A heat dissipation device adapted to dissipate heat of a heat source in an electronic system. The heat dissipation device includes a thermally conductive plastic shell and a fluid. The thermally conductive plastic shell has at least one sealed accommodation space. The fluid completely fills the at least one sealed accommodation space of the thermally conductive plastic shell.
    Type: Application
    Filed: June 9, 2020
    Publication date: September 16, 2021
    Applicant: Zyxel Networks Corporation
    Inventors: Lu-Wei Chiang, Liang-Wei Chen, Hui-Lung Chien
  • Patent number: 11088856
    Abstract: A memory storage system is provided according to an exemplary embodiment of the disclosure. The memory storage system includes a host system and a memory storage device. In a first handshake operation, the memory storage device transmits first encrypted information corresponding to first authentication information to the host system, and the host system transmits second encrypted information corresponding to the first authentication information to the memory storage device. In a second handshake operation, the memory storage device transmits third encrypted information corresponding to second authentication information to the host system, and the host system transmits fourth encrypted information corresponding to third authentication information to the memory storage device based on the third encrypted information. The third authentication information is configured to encrypt data transmitted between the host system and the memory storage device in a developer command transmission stage.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: August 10, 2021
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Liang-Wei Chen
  • Publication number: 20190222427
    Abstract: A memory storage system is provided according to an exemplary embodiment of the disclosure. The memory storage system includes a host system and a memory storage device. In a first handshake operation, the memory storage device transmits first encrypted information corresponding to first authentication information to the host system, and the host system transmits second encrypted information corresponding to the first authentication information to the memory storage device. In a second handshake operation, the memory storage device transmits third encrypted information corresponding to second authentication information to the host system, and the host system transmits fourth encrypted information corresponding to third authentication information to the memory storage device based on the third encrypted information. The third authentication information is configured to encrypt data transmitted between the host system and the memory storage device in a developer command transmission stage.
    Type: Application
    Filed: March 19, 2018
    Publication date: July 18, 2019
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Liang-Wei Chen
  • Patent number: 9081266
    Abstract: A light source module includes a shell, a fixed ring, an optical element, a first cover and a light-emitting element. The shell is formed as a tubular shape. The fixed ring, the optical element and the light-emitting element are all received in an inside of the shell, and the first cover is disposed at an end of the shell. In addition, the shell has a first stop part disposed in the inside of the shell, the optical element is disposed between the first stop part and the fixed ring, and the optical element is leant against the first stop part and the fixed ring. The light-emitting element is disposed between the fixed ring and the first cover, and is leant against the fixed ring and the first cover. A projection device using the source light module is also provided.
    Type: Grant
    Filed: July 18, 2012
    Date of Patent: July 14, 2015
    Assignee: CORETRONIC CORPORATION
    Inventors: Hung-Lin Lee, Liang-Wei Chen
  • Publication number: 20130120719
    Abstract: A light source module includes a shell, a fixed ring, an optical element, a first cover and a light-emitting element. The shell is formed as a tubular shape. The fixed ring, the optical element and the light-emitting element are all received in an inside of the shell, and the first cover is disposed at an end of the shell. In addition, the shell has a first stop part disposed in the inside of the shell, the optical element is disposed between the first stop part and the fixed ring, and the optical element is leant against the first stop part and the fixed ring. The light-emitting element is disposed between the fixed ring and the first cover, and is leant against the fixed ring and the first cover. A projection device using the source light module is also provided.
    Type: Application
    Filed: July 18, 2012
    Publication date: May 16, 2013
    Applicant: CORETRONIC CORPORATION
    Inventors: Hung-Lin LEE, Liang-Wei CHEN
  • Patent number: 8305288
    Abstract: An antenna module including a casing, a USB connecting end, an antenna, a key and a moving component is provided. The casing has a terminal end opposite to the USB connecting end and a hole located at the terminal end. The antenna is disposed in the casing near the terminal end. The key disposed in the casing has an enabling portion for enabling the key when being touched. The moving component disposed in the casing includes a contacting member and an actuating member. The contacting member has first and second ends and a pivotal portion. The pivotal portion is pivotally connected to the casing between the first and second ends. The actuating member exposed from the hole is for moving toward the USB connecting end. The first end is driven by the actuating member, so that the second end is rotated around the pivotal portion to touch the enabling portion.
    Type: Grant
    Filed: August 19, 2009
    Date of Patent: November 6, 2012
    Assignee: Arcadyan Technology Corporation
    Inventor: Liang-Wei Chen
  • Patent number: 8279594
    Abstract: A data transmission base is used to transmit data for a data transmission device. The data transmission device has a data transmission body and a cover. The data transmission body has a first transmission interface. The data transmission base includes a transmission connection body and a cover connection body. The transmission connection body has a second transmission interface for connecting the first transmission interface. The cover connection body, which is connected to the transmission connection body, is used for connecting the cover.
    Type: Grant
    Filed: January 14, 2009
    Date of Patent: October 2, 2012
    Assignee: Arcadyan Technology Corporation
    Inventor: Liang-Wei Chen
  • Patent number: 7710730
    Abstract: A fixing heat dissipating unit that is disposed in an electronic device is connected to a substrate and a heat source. The fixing heat dissipating unit includes a fixing element and a heat conducting element. The fixing element is connected to the substrate to hold the substrate in the electronic device. The heat conducting element is respectively connected to the heat source and the fixing element. The heat source is a part of the electronic device and the fixing element is integrated with the heat conducting element as a single component. An electronic device having the fixing heat dissipating unit is also disclosed.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: May 4, 2010
    Assignee: Arcadyan Technology Corporation
    Inventor: Liang-Wei Chen
  • Publication number: 20100060533
    Abstract: An antenna module including a casing, a USB connecting end, an antenna, a key and a moving component is provided. The casing has a terminal end opposite to the USB connecting end and a hole located at the terminal end. The antenna is disposed in the casing near the terminal end. The key disposed in the casing has an enabling portion for enabling the key when being touched. The moving component disposed in the casing includes a contacting member and an actuating member. The contacting member has first and second ends and a pivotal portion. The pivotal portion is pivotally connected to the casing between the first and second ends. The actuating member exposed from the hole is for moving toward the USB connecting end. The first end is driven by the actuating member, so that the second end is rotated around the pivotal portion to touch the enabling portion.
    Type: Application
    Filed: August 19, 2009
    Publication date: March 11, 2010
    Applicant: Arcadyan Technology Corporation
    Inventor: Liang-Wei CHEN
  • Publication number: 20100042768
    Abstract: A data transmission base is used to transmit data for a data transmission device. The data transmission device has a data transmission body and a cover. The data transmission body has a first transmission interface. The data transmission base includes a transmission connection body and a cover connection body. The transmission connection body has a second transmission interface for connecting the first transmission interface. The cover connection body, which is connected to the transmission connection body, is used for connecting the cover.
    Type: Application
    Filed: January 14, 2009
    Publication date: February 18, 2010
    Inventor: Liang-Wei CHEN
  • Publication number: 20100033934
    Abstract: A fixing heat dissipating unit that is disposed in an electronic device is connected to a substrate and a heat source. The fixing heat dissipating unit includes a fixing element and a heat conducting element. The fixing element is connected to the substrate to hold the substrate in the electronic device. The heat conducting element is respectively connected to the heat source and the fixing element. The heat source is a part of the electronic device and the fixing element is integrated with the heat conducting element as a single component. An electronic device having the fixing heat dissipating unit is also disclosed.
    Type: Application
    Filed: December 22, 2008
    Publication date: February 11, 2010
    Inventor: Liang-Wei CHEN
  • Patent number: 7589385
    Abstract: A CMOS transistor device including a tensile-stressed NMOS transistor and a PMOS transistor is disclosed. The NMOS transistor includes a gate, a gate oxide layer between the gate and semiconductor substrate, a silicon oxide offset spacer on sidewalls of the gate, N type lightly doped source/drain implanted into the semiconductor substrate next to the silicon oxide offset spacer, N type heavily doped source/drain implanted into the semiconductor substrate next to the N type lightly doped source/drain, and tensile-stressed silicon nitride layer covering the gate, the N type lightly doped source/drain, and the N type heavily doped source/drain.
    Type: Grant
    Filed: July 26, 2005
    Date of Patent: September 15, 2009
    Assignee: United Microelectronics Corp.
    Inventors: Chien-Ting Lin, Liang-Wei Chen, Che-Hua Hsu, Meng-Lin Lee, Hui-Chen Chang, Wei-Tsun Shiau
  • Publication number: 20070298573
    Abstract: The invention is directed to a method for manufacturing a semiconductor device. The method comprises steps of forming a gate dielectric layer, a polysilicon layer and a patterned cap layer over a substrate sequentially and patterning the polysilicon layer to be a polysilicon gate by using the patterned cap layer as a mask. A plurality of lightly doped drain (LDD) regions are formed in the substrate aside the polysilicon gate, wherein a channel region is formed between the LDD regions in the substrate. A spacer is formed on the sidewall of the polysilicon gate and a source/drain region is formed in the substrate adjacent to the spacer. The patterned cap layer is removed and the spacer is removed. A metal silicidation process is performed for transforming the polysilicon gate into a metal silicide gate and forming a metal silicide layer at a surface of the source/drain region.
    Type: Application
    Filed: June 22, 2006
    Publication date: December 27, 2007
    Inventors: Chien-Ting Lin, Liang-Wei Chen, Che-Hua Hsu, Guan-Hua Ma