Patents by Inventor Liang-Yun Chen

Liang-Yun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120227667
    Abstract: Substrate carrier having multiple emissivity coefficients for thin film processing and more particularly for support of a substrate during a deposition process epitaxially growing a film on the substrate. A front side of the carrier has a first carrier surface upon which the substrate is to be disposed, the first carrier surface having a first emissivity coefficient different than a second emissivity coefficient of a second carrier surface adjacent to the first carrier surface. Selection of the second emissivity coefficient independent of the first emissivity coefficient may modify an amount of energy radiated from the second carrier surface during processing of the substrate. In one embodiment, the second carrier surface has a second emissivity coefficient which is lower than the first emissivity coefficient to reduce heat loss from the carrier surface while maintaining high efficiency energy transfer between the carrier and a substrate.
    Type: Application
    Filed: March 6, 2012
    Publication date: September 13, 2012
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Juno Yu-Ting HUANG, Suresh M. SHRAUTI, Alain DUBOUST, David BOUR, Wei-Yung HSU, Liang-Yun CHEN
  • Patent number: 7344432
    Abstract: An article of manufacture and apparatus are provided for processing a substrate surface. In one aspect, an article of manufacture is provided for polishing a substrate including polishing article comprising a body having at least a partially conductive polishing surface. An electrode is disposed below the polishing surface having a dielectric material therebetween. A plurality of apertures may be formed in the polishing surface and the dielectric material to at least partially expose the electrode to the polishing surface. A membrane may be disposed between the electrode and the polishing surface that is permeable to ions and current to promote continuity between the electrode and the polishing surface.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: March 18, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Liang-Yun Chen, Yuchun Wang, Yan Wang, Alain Duboust, Daniel A. Carl, Ralph Wadensweiler, Manoocher Birang, Paul D. Butterfield, Rashid A. Mavliev, Stan D. Tsai, You Wang, Jie Diao, Renhe Jia, Lakshmanan Karuppiah, Robert Ewald
  • Publication number: 20020102842
    Abstract: The present invention relates generally to an improved process for providing uniform step coverage on a substrate and planarization of metal layers to form continuous, void-free contacts or vias in sub-half micron applications. In one aspect of the invention, a refractory layer is deposited onto a substrate having high aspect ratio contacts or vias formed thereon. A CVD metal layer is then deposited onto the refractory layer at low temperatures to provide a conformal wetting layer for a PVD metal. Next, a PVD metal is deposited onto the previously formed CVD metal layer at a temperature below that of the melting point temperature of the metal. The resulting CVD/PVD metal layer is substantially void-free.
    Type: Application
    Filed: February 11, 2002
    Publication date: August 1, 2002
    Applicant: Applied Materials, Inc.
    Inventors: Roderick Craig Mosley, Hong Zhang, Fusen Chen, Ted Guo, Liang-Yun Chen