Patents by Inventor Liangchun Yu

Liangchun Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High voltage semiconductor devices having improved electric field suppression
    Patent number: 11538769
    Abstract: A semiconductor device is provided. The semiconductor device includes an electric field (E-field) suppression layer formed over a termination region. The E-field suppression layer is patterned with openings over metal contact areas. The E-field suppression layer has a thickness such that an electric field strength above the E-field suppression layer is below a dielectric strength of an adjacent material when the semiconductor device is operating at or below a maximum voltage.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: December 27, 2022
    Assignee: General Electric Company
    Inventors: Stephen Daley Arthur, Liangchun Yu, Nancy Cecelia Stoffel, David Richard Esler, Christopher James Kapusta
  • Methods of fabricating high voltage semiconductor devices having improved electric field suppression
    Patent number: 10892237
    Abstract: Methods of fabricating a semiconductor device are provided. The method includes providing a plurality of semiconductor devices. The method further includes disposing a dielectric dry film on the plurality of semiconductor devices, wherein the dielectric dry film is patterned such that openings in the patterned dielectric dry film are aligned with conductive pads of each of the plurality of semiconductor devices.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: January 12, 2021
    Assignee: General Electric Company
    Inventors: Stephen Daley Arthur, Liangchun Yu, Nancy Cecelia Stoffel, David Richard Esler, Christopher James Kapusta
  • HIGH VOLTAGE SEMICONDUCTOR DEVICES HAVING IMPROVED ELECTRIC FIELD UPPRESSION
    Publication number: 20200194387
    Abstract: A semiconductor device is provided. The semiconductor device includes an electric field (E-field) suppression layer formed over a termination region. The E-field suppression layer is patterned with openings over metal contact areas. The E-field suppression layer has a thickness such that an electric field strength above the E-field suppression layer is below a dielectric strength of an adjacent material when the semiconductor device is operating at or below a maximum voltage.
    Type: Application
    Filed: December 14, 2018
    Publication date: June 18, 2020
    Inventors: Stephen Daley Arthur, Liangchun Yu, Nancy Cecelia Stoffel, David Richard Esler, Christopher James Kapusta
  • METHODS OF FABRICATING HIGH VOLTAGE SEMICONDUCTOR DEVICES HAVING IMPROVED ELECTRIC FIELD SUPPRESSION
    Publication number: 20200194388
    Abstract: Methods of fabricating a semiconductor device are provided. The method includes providing a plurality of semiconductor devices. The method further includes disposing a dielectric dry film on the plurality of semiconductor devices, wherein the dielectric dry film is patterned such that openings in the patterned dielectric dry film are aligned with conductive pads of each of the plurality of semiconductor devices.
    Type: Application
    Filed: December 14, 2018
    Publication date: June 18, 2020
    Inventors: Stephen Daley Arthur, Liangchun Yu, Nancy Cecelia Stoffel, David Richard Esler, Christopher James Kapusta