Abstract: A processor, a signal adjustment method, and a computer system including the processor are provided, pertaining to the field of computer technologies. The processor includes a memory controller. The memory controller includes a memory physical interface and a first processor core, and the first processor core is connected to the memory physical interface. After the computer system is started and during a running process of the computer system, the first processor core is configured to adjust a timing relationship between a target signal of the memory physical interface and a synchronization signal of the target signal. According to this application, timing alignment can be ensured between the target signal and the synchronization signal, thereby improving correctness of sampling performed on the target signal.

Abstract: A memory initialization apparatus and method, and a computer system are provided. The memory initialization apparatus includes a first processor core and a memory controller that includes at least one second processor core. In a memory initialization process, the first processor core may invoke the second processor core to perform memory initialization. This helps to shorten memory initialization duration.

Abstract: A BIOS startup method is disclosed, the method includes: in a first access mode, allocating, by a current node, a local MMCFG in a space below a local access address of the current node that is a first address, and completing memory initialization; and when performing unified memory addressing of a system, moving positions of addresses of a part or an entirety of the MMCFG space of the current node from the original space below the first address in a global access address of the system to a space that is above the first address and can be accessed in a second access mode.

Abstract: A BIOS startup method is disclosed, the method includes: in a first access mode, allocating, by a current node, a local MMCFG in a space below a local access address of the current node that is a first address, and completing memory initialization; and when performing unified memory addressing of a system, moving positions of addresses of a part or an entirety of the MMCFG space of the current node from the original space below the first address in a global access address of the system to a space that is above the first address and can be accessed in a second access mode.