Abstract: Presented herein are embodiments of a two-stage methodology that integrates data-driven imitation learning and model-based trajectory optimization to generate optimal trajectories for autonomous excavators. In one or more embodiments, a deep neural network using demonstration data to mimic the operation patterns of human experts under various terrain states, including their geometry shape and material type. A stochastic trajectory optimization methodology is used to improve the trajectory generated by the neural network to ensure kinematics feasibility, improve smoothness, satisfy hard constraints, and achieve desired excavation volumes. Embodiments were tested on a Franka robot arm equipped with a bucket end-effector. Embodiments were also evaluated on different material types, such as sand and rigid blocks. Experimental results showed that embodiments of the two-stage methodology that comprises combining expert knowledge and model optimization increased the excavation weights by up to 24.

Abstract: A dynamic characteristic analysis method of DET and RELAP5 coupling based on a universal instrumental variable method includes steps of: constructing a DET simulation model of a discrete dynamic event tree and modifying TRIP cards of an input file by adding universal instrumental TRIP variables according to state transition types of DET simulation objects, the universal instrumental TRIP variable being variable type or logical type; setting a simulation time of the RELAP5, controlling a simulation step, and analyzing an output result file of each simulation step of the RELAP5; backtracking the RELAP5 according to state transition types of DET simulation objects. The dynamic characteristic analysis method has advantages of simplifying TRIP setting process and method of DET state transition objects in an input file of the RELAP5 required for the coupling of DET and RELAP5, reducing a modeling complexity and improving a modeling efficiency.

Abstract: The present disclosure relates to a first electrical interface arranged on one of a battery pack and an external device. The battery pack is engaged to the external device. The first electrical interface includes a first sliding groove and a second sliding groove which extend in an engaging direction and are configured for guiding the battery pack to be mechanically connected with the external device. The first electrical interface further includes a plurality of first terminals configured for being electrically connected with corresponding terminals of the other one of the battery pack and the external device. At least one first terminal is at least partially accommodated in the first sliding groove, and/or at least one first terminal is at least partially accommodated in the second sliding groove.

Abstract: The present disclosure relates to a battery pack, including a housing having a top and a bottom arranged opposite to each other and a first side portion and a second side portion arranged opposite to each other; a sliding slot used for guiding the battery pack to achieve mechanical connection with the electrical device; and a locking portion used for achieving locking between the battery pack and the electrical device, wherein the top includes a top plane and a top recess under the top plane in the height direction, the top recess includes the sliding slot and the locking portion, and the sliding slot is recessed downward from the top plane in the height direction, and the first side portion, the second side portion, and the sliding slot all extend in the longitudinal direction of the battery pack.

Abstract: Disclosed are a battery pack and a manufacturing method therefor. The battery pack comprises: a battery module, comprising several cells, wherein the cells are electrically connected to each other, and each cell comprises an outer side face in the direction of longitudinal extension thereof; an adapter portion, for establishing mechanical and electrical connection between an electric tool and the battery pack; a holder, wherein an accommodating cavity is internally formed in the holder, and the cells are at least partially received in the accommodating cavity; and a filler, which wraps the outer side faces of the cells, is located at an inner side of the accommodating cavity and is used for transferring heat generated by the cells out of the accommodating cavity. The outer side faces of the cells are completely accommodated in the accommodating cavity, and the ratio of the length along which the filler is set in the lengthwise direction of the cells to the length of the cells is not less than 30%.

Abstract: A dynamic characteristic analysis method of DET and RELAP5 coupling based on a universal instrumental variable method includes steps of: constructing a DET simulation model of a discrete dynamic event tree and modifying TRIP cards of an input file by adding universal instrumental TRIP variables according to state transition types of DET simulation objects, the universal instrumental TRIP variable being variable type or logical type; setting a simulation time of the RELAP5, controlling a simulation step, and analyzing an output result file of each simulation step of the RELAP5; backtracking the RELAP5 according to state transition types of DET simulation objects. The dynamic characteristic analysis method has advantages of simplifying TRIP setting process and method of DET state transition objects in an input file of the RELAP5 required for the coupling of DET and RELAP5, reducing a modeling complexity and improving a modeling efficiency.

Abstract: The invention provides a bedding structure used for supporting back and neck, which is composed of an adjustment base, a plurality of extension arms and a plurality of support plates. It may only use a rotating motor to drive the mechanical deformation of a lying structure to form an ergonomically sitting structure or a structure between lying and sitting.

Abstract: A light-emitting diode includes a first-type nitride region, a light-emitting region and a second-type nitride region, wherein the first-type nitride region includes a plurality of alternating first nitride layers and second nitride layers. The second nitride layers have high-doped emitting points pointing to the corresponding first nitride layer. The second-type nitride region includes a plurality of alternating third nitride layers and fourth nitride layers, wherein doping concentration of the fourth nitride layer is higher than that of the third nitride layer, and the fourth nitride layer has high-doped emitting points pointing to the third nitride layer.

Abstract: A light-emitting diode includes a first-type nitride region, a light-emitting region and a second-type nitride region, wherein the first-type nitride region includes a plurality of alternating first nitride layers and second nitride layers. The second nitride layers have high-doped emitting points pointing to the corresponding first nitride layer. The second-type nitride region includes a plurality of alternating third nitride layers and fourth nitride layers, wherein doping concentration of the fourth nitride layer is higher than that of the third nitride layer, and the fourth nitride layer has high-doped emitting points pointing to the third nitride layer.

Abstract: A nitride light-emitting diode includes a substrate, an n-type nitride layer, a light-emitting layer, a p-type nitride layer, a p+ layer, an AlInN layer, an n+ layer, and an ITO transparent electrode. A tunneling structure with an AlInN intermediate layer is adopted as the contact layer, which generates polarization charges at the tunneling junction interface and maintains effective width of the depletion region, thereby increasing tunneling probability of holes and reducing contact resistances.

Abstract: A fabrication method of nitride LEDs, which reduces electron leakage and efficiency droop and improves hole concentration and light emitting efficiency, the method including: (1) providing an intermediate substrate; (2) growing a P-type semiconductor layer and a first bonding layer on the intermediate substrate in sequence; (3) providing a permanent substrate; (4) growing an N-type semiconductor layer, a light emitting layer and a second bonding layer on the permanent substrate; (5) bonding the intermediate substrate with the P-type semiconductor layer and the permanent substrate with the N-type semiconductor layer and the light emitting layer through the first bonding layer and the second bonding layer.

Abstract: A four-junction quaternary compound solar cell and a method thereof are provided. Forming a first subcell (100) with a first band gap, a lattice constant matching with the substrate on an InP grown substrate, forming a second subcell (200) with a second band gap bigger than the first band gap, a lattice constant matching with the substrate on the first subcell, forming a graded buffer layer (600) with a third band gap bigger than the second band gap on the second subcell, forming a third subcell (300) with a fourth band gap bigger than the third band gap, a lattice constant smaller than the substrate on the graded buffer layer, forming a fourth subcell (400) with a fifth band gap bigger than the fourth band gap, a lattice constant matching with the third subcell on the third subcell, and then forming the required four-junction solar cell then by succeeding process including removing the grown substrate, bonding a support substrate, forming electrodes, evaporating an anti-reflect film and so on.

Abstract: A nitride light-emitting diode includes a substrate, an n-type nitride layer, a light-emitting layer, a p-type nitride layer, a p+ layer, an AlInN layer, an n+ layer, and an ITO transparent electrode. A tunneling structure with an AlInN intermediate layer is adopted as the contact layer, which generates polarization charges at the tunneling junction interface and maintains effective width of the depletion region, thereby increasing tunneling probability of holes and reducing contact resistances.

Abstract: A fabrication method for an inverted solar cell includes: (1) providing a growth substrate; (2) depositing a SiO2 mask layer over the surface of the growth substrate to form a patterned substrate; (3) forming a sacrificial layer with epitaxial growth over the patterned substrate, wherein the sacrificial layer encompasses the entire SiO2 mask pattern; (4) forming a buffer layer over the sacrificial layer via epitaxial growth; (5) forming a semiconductor material layer sequence of the inverted solar cell over the buffer layer with epitaxial growth; (6) bonding the semiconductor material layer sequence of the inverted solar cell with a supporting substrate; (7) selectively etching the SiO2 mask layer by wet etching; and (8) selectively etching the sacrificial layer by wet etching to lift off the growth substrate.

Abstract: A four-junction quaternary compound solar cell and a method thereof are provided.

Abstract: A fabrication method for an inverted solar cell includes: (1) providing a growth substrate; (2) depositing a SiO2 mask layer over the surface of the growth substrate to form a patterned substrate; (3) forming a sacrificial layer with epitaxial growth over the patterned substrate, wherein the sacrificial layer encompasses the entire SiO2 mask pattern; (4) forming a buffer layer over the sacrificial layer via epitaxial growth; (5) forming a semiconductor material layer sequence of the inverted solar cell over the buffer layer with epitaxial growth; (6) bonding the semiconductor material layer sequence of the inverted solar cell with a supporting substrate; (7) selectively etching the SiO2 mask layer by wet etching; and (8) selectively etching the sacrificial layer by wet etching to lift off the growth substrate.

Abstract: A high-concentration multi-junction solar cell and method for fabricating same is provided. The high-concentration multi-junction solar cell comprises a top cell, an intermediate cell, a bottom cell and two tunneling junctions connecting the top cell and intermediate cell and the intermediate cell and bottom cell. The emitter layers of the top and intermediate cells both employ the graded doping concentrations and have high open circuit voltage and short circuit current. The top cell emitter layer is over several hundred nanometers thicker than that of the traditional multi-junction cell so as to decrease the whole series resistance of the multi-junction cell, improve the fill factor, and gain higher photoelectric conversion efficiency.