Abstract: A method and device for implementing an FPGA-based large-scale radio frequency interference array correlator are provided. The method includes: obtaining the number of channels of data of a radio frequency interference array, and performing average division; calculating the total correlation of data group and the total correlation between the data group and other data groups respectively through corresponding correlation calculation modules, and performing an accumulation calculation in an integration period to complete the total correlation operation of the radio frequency interference array. By means of grouping division and time division multiplexing, the FPGA resource is effectively utilized, and the calculation process of FPGA is simplified. The new method is suitable for the operation process of the system with high parallelism and high real-time requirements, and provides a high-efficiency solution for the real-time calculation of massive data of the large-scale radio frequency interference array.

Abstract: A method and device for implementing an FPGA-based large-scale radio frequency interference array correlator are provided. The method includes: obtaining the number of channels of data of a radio frequency interference array, and performing average division; calculating the total correlation of data group and the total correlation between the data group and other data groups respectively through corresponding correlation calculation modules, and performing an accumulation calculation in an integration period to complete the total correlation operation of the radio frequency interference array. By means of grouping division and time division multiplexing, the FPGA resource is effectively utilized, and the calculation process of FPGA is simplified. The new method is suitable for the operation process of the system with high parallelism and high real-time requirements, and provides a high-efficiency solution for the real-time calculation of massive data of the large-scale radio frequency interference array.

Abstract: A digital receiving apparatus includes an analog-to-digital conversion module, a polyphase filter module, a fast Fourier transform module and a phase compensation module, which transforms signals of a target radio source from time domain to frequency domain. It further includes a standard time acquisition module configured to acquire a standard timestamp, a communication module configured to communicate with a host computer, a delay parameter temporary storage module configured to store a to-be-compensated delay parameter, a control enable module configured to generate an enable signal, a delay module configured to perform delay, and a phase parameter generation module configured to temporarily store the to-be-compensated delay parameter and convert it into a phase compensation parameter.

Abstract: A digital receiving apparatus includes an analog-to-digital conversion module, a polyphase filter module, a fast Fourier transform module and a phase compensation module, which transforms signals of a target radio source from time domain to frequency domain. It further includes a standard time acquisition module configured to acquire a standard timestamp, a communication module configured to communicate with a host computer, a delay parameter temporary storage module configured to store a to-be-compensated delay parameter, a control enable module configured to generate an enable signal, a delay module configured to perform delay, and a phase parameter generation module configured to temporarily store the to-be-compensated delay parameter and convert it into a phase compensation parameter.