Patents by Inventor Libbert Peng

Libbert Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and structure for self aligned formation of a gate polysilicon layer
    Patent number: 7807532
    Abstract: A method for processing semiconductor devices includes providing a semiconductor substrate. The method includes forming a pad oxide layer overlying the substrate and forming a silicon nitride layer overlying the pad oxide layer. The method includes forming a trench region extending through an entirety of a portion of the silicon nitride layer and extends into a depth of the semiconductor substrate. The method also includes filling the trench region with an oxide material. The oxide material extends from a bottom portion of the trench region to an upper surface of the silicon nitride layer. The method includes planarizing the oxide material and selectively removing the silicon nitride layer to form an isolation structure. A polysilicon material is deposited overlying the isolation structure. The polysilicon material is planarized to expose a top portion of the isolation structure and form a first electrode and a second electrode structures separated by a portion of the isolation structure.
    Type: Grant
    Filed: January 12, 2007
    Date of Patent: October 5, 2010
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Li Jiang, Ying Shao, Libbert Peng, Auter Wu
  • METHOD AND STRUCTURE FOR SELF ALIGNED FORMATION OF A GATE POLYSILICON LAYER
    Publication number: 20070243685
    Abstract: A method for processing semiconductor devices includes providing a semiconductor substrate. The method includes forming a pad oxide layer overlying the substrate and forming a silicon nitride layer overlying the pad oxide layer. The method includes forming a trench region extending through an entirety of a portion of the silicon nitride layer and extends into a depth of the semiconductor substrate. The method also includes filling the trench region with an oxide material. The oxide material extends from a bottom portion of the trench region to an upper surface of the silicon nitride layer. The method includes planarizing the oxide material and selectively removing the silicon nitride layer to form an isolation structure. A polysilicon material is deposited overlying the isolation structure. The polysilicon material is planarized to expose a top portion of the isolation structure and form a first electrode and a second electrode structures separated by a portion of the isolation structure.
    Type: Application
    Filed: January 12, 2007
    Publication date: October 18, 2007
    Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Li Jiang, Ying Shao, Libbert Peng, Auter Wu