Abstract: The embodiments of the present disclosure provides a display substrate, including: an active region and a peripheral region, the active region is provided therein with a plurality of pixel units arranged in an array, all the pixel units are divided into n pixel unit groups, the peripheral region is provided therein with a driver block including a first gate drive circuit having n+x first signal output terminals configured to sequentially output first gate drive signals in an active level and the first gate line provided for an ith pixel unit group is electrically connected to a (i+x)th first signal output terminal, and the reset signal line provided for the ith pixel unit group is electrically connected to an ith first signal output terminal, with i being a positive integer and i?n.

Abstract: A display substrate and a display device are provided. The display substrate includes a shift register unit, a first clock signal line and a first power line, the shift register unit includes a charge pump circuit, and the charge pump circuit includes a first capacitor, a first transistor and a second capacitor. The charge pump circuit is electrically connected with a first input node and a first node, respectively. A first electrode plate of the first capacitor is connected with the first clock signal line, a second electrode plate of the first capacitor is connected with the first input node, a first electrode plate of the second capacitor is connected with the first power line, a second electrode plate of the second capacitor is connected with the first node, a gate electrode of the first transistor is connected with a first electrode or a second electrode of the first transistor.

Abstract: Provided are a pixel driving circuit and a display panel. The pixel driving circuit includes: a data writing sub-circuit, a threshold compensation sub-circuit, a driving sub-circuit, a storage sub-circuit, a first reset sub-circuit, a second reset sub-circuit. The driving sub-circuit and the storage sub-circuit are connected at a first node; the data writing sub-circuit and the storage sub-circuit are connected at a second node; the first reset sub-circuit includes a first transistor having a control electrode connected with a first reset signal line, a first electrode connected with a first initialization signal line, and a second electrode connected with the first node; the threshold compensation sub-circuit includes a second transistor having a first electrode connected with the first node, a second electrode connected with the second node, and a control electrode connected with a second scan line; the first transistor and/or the second transistor includes an oxide thin film transistor.

Abstract: Provided is an organic light-emitting diode display substrate, including: a source/drain layer, a planarization layer and an anode layer which are laminated in sequence, wherein the source/drain layer includes at least one pair of first signal lines; the anode layer includes a common power line, wherein the common power line is provided with vent holes; overlapping areas between two first signal lines in each pair of the first signal lines and a projection pattern of the vent hole are equal, the overlapping area being greater than 0, wherein the projection pattern of the vent hole is a pattern of an orthographic projection of the vent hole in the common power line on the source/drain layer. A display panel and a display device are also provided.

Abstract: A display substrate includes a pixel driving circuit, which includes a driving circuit, a storage circuit and a reset circuit. The reset circuit is electrically connected to a first terminal of the driving circuit. The driving circuit is used to conduct a path between the first terminal and a second terminal of the driving circuit under the control of a potential at its control terminal. The storage circuit is electrically connected to the control terminal of the driving circuit. The reset circuit includes a first capacitor. The storage circuit includes a second capacitor. An area of an overlap between orthographic projections of a first electrode plate and a second electrode plate of the first capacitor on the base substrate is smaller than that of the second capacitor on the base substrate.

Abstract: Embodiments of the present disclosure relate to the field of display technology, and in particular, to an array substrate, a display panel and a display device thereof. The array substrate includes a substrate and a plurality of sub-pixels on the substrate. Each sub-pixel includes a pixel circuit. The pixel circuit includes a plurality of transistors. The plurality of transistors includes at least one oxide transistor. The array substrate further includes: an oxide semiconductor layer on the substrate, the oxide semiconductor layer comprising a channel region of the oxide transistor; a first planarization layer on the substrate and covering at least a portion of the oxide semiconductor layer; a barrier part on the side of the first planarization layer away from the substrate.

Abstract: A display substrate and a display device are provided, the display substrate includes: a substrate, and a power source layer, a conductive layer, and a cathode layer sequentially stacked on the substrate in a direction away from the substrate; the conductive layer includes first conductive patterns and second conductive patterns insulated from each other, the first conductive patterns are coupled to the power source layer, and the second conductive patterns are coupled to the cathode layer.

Abstract: A shift register circuit includes a first control sub-circuit and a first output sub-circuit. The first control sub-circuit is configured to: adjust a voltage of a first node to a turn-on voltage due to an influence of a first direct current voltage signal from a first clock signal terminal, an initial voltage signal from an initial signal terminal and a second direct current voltage signal from a second clock signal terminal; and maintain the voltage of the first node at the turn-on voltage due to an influence of a first clock signal from the first clock signal terminal and a second clock signal from the second clock signal terminal. The first output sub-circuit is configured to be turned on under a control of the turn-on voltage of the first node to transmit a first voltage signal from a first voltage terminal to a signal output terminal.

Abstract: A shift register unit, a method for driving a shift register unit, a gate driving circuit, and a display device are provided. The shift register unit includes: an input control circuit, configured to control a level of the first node; a first control circuit, configured to control a level of the second node; a second control circuit, configured to control the level of the second node under control of a fourth clock signal and an output signal; an output circuit, configured to control a level of the output terminal under control of the level of the first node and the level of the second node; and a first reset circuit, configured to control the level of the output terminal under control of the first enable signal, so as to allow the output terminal to stably output a non-operating level during a detection phase.

Abstract: A method of preparing antimicrobial surface on medical devices: first, producing multi-functional surface with bacterial anti-adhesion and self-cleaning functions through single-stop ultrafast laser fabrication approach for development of micro/nano patterns, then producing bactericidal thin film through depositing metal nanoparticles on those micro/nano patterned surfaces. The combination of bacterial anti-adhesion and bactericidal film can inhibit initial bacterial adhesion and release heavy metal ions to kill the bacteria simultaneously. Meanwhile, the multi-functional surface with self-cleaning function can prevent the killed bacteria from accumulating at the substrate surface, thereby obtaining long-lasting antibacterial effect.

Abstract: A method of preparing antimicrobial surface on medical devices: first, producing multi-functional surface with bacterial anti-adhesion and self-cleaning functions through single-stop ultrafast laser fabrication approach for development of micro/nano patterns, then producing bactericidal thin film through depositing metal nanoparticles on those micro/nano patterned surfaces. The combination of bacterial anti-adhesion and bactericidal film can inhibit initial bacterial adhesion and release heavy metal ions to kill the bacteria simultaneously. Meanwhile, the multi-functional surface with self-cleaning function can prevent the killed bacteria from accumulating at the substrate surface, thereby obtaining long-lasting antibacterial effect.

Abstract: The present invention disclosed a method for fabrication of fluorescence-Raman dual enhanced modal biometal substrate. The method comprises the steps of grinding surface of the substrate with different types of sandpapers to remove an oxide layer and smooth the surface of the substrate; wherein a roughness of the surface is less than 0.1 ?m; cleaning the grinded substrate in an ultrasonic bath to remove any impurity; placing the specimen on the stage of an ultrashort laser system; processing the specimen at a certain laser processing parameters by a galvanometer; finally, three-dimensional micro-nano structure is fabricated on the specimen. The technique of the present invention is promising for large-scale commercial application because it is simple and economical, while the enhanced Raman and fluorescence signal is stable and high reproducibility.