Patents by Inventor Libing BAI

Libing BAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240020448
    Abstract: A circuit and method for simulating real-time reconfigurable general-purpose memristor, nonlinear m-order polynomial fitting of mathematical model of a memristor is performed by using McLaughlin formula. m is related to the amplitude and frequency of an input signal and the fitting accuracy, thus the mathematical model of a memristor can be easily and quickly adapted by updating the polynomial order, the polynomial coefficients and the FPGA system clock cycle. Based on the FPGA, a system state variable generation module, a FIFO, a output module are used to obtain an output signal y[n]. the detailed steps of signal processing and displaying are given to obtain a display of a pinched hysteresis loop and a waveform display of time-domain. Simulation of high frequency memristor by setting polynomial coefficients can be obtained. Meanwhile, this is built based on FPGA, adopt digital circuit to simulates a reconfigurable general-purpose memristor, and experimental accuracy is enhanced.
    Type: Application
    Filed: October 19, 2022
    Publication date: January 18, 2024
    Applicant: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Bo XU, Hang GENG, Libing BAI, Yuhua CHENG, Kai CHEN, Songting ZOU
  • Publication number: 20220412919
    Abstract: The present invention provides a method for eddy current thermography defect reconstruction based on electrical impedance tomography, first, obtaining a thermal reference image of temperature change with time by acquiring a thermogram sequence S of the specimen in the process of heating and fitting a curve for pixels of each location of the thermogram sequence S, then, creating a current matrix and a magnetic potential matrix, and calculating the satisfied conductivity distribution through iterations, so as a reconstructed image is obtained, then taking the low conductivity area of the reconstructed image as the defect profile, thus the defect profile is identified and quantified.
    Type: Application
    Filed: August 29, 2022
    Publication date: December 29, 2022
    Applicant: University of Electronic Science and Technology of China
    Inventors: Libing BAI, Xu ZHANG, Chao REN, Yiping LIANG, Ruiheng ZHANG, Yong DUAN, Jinliang SHAO, Yali ZHENG, Yuhua CHENG
  • Publication number: 20220373577
    Abstract: The present invention provides a system for data mapping and storing in digital three-dimensional oscilloscope, wherein the fixed coefficients, which are calculated according the parameters and settings of a digital oscilloscope, are stored into a fixed coefficient memory CO RAM, the fixed coefficients are outputted to N fractional operation units through N?1 D flip-flop delay units to multiply with the acquired data x(n) and then be accumulated, thus N fractional calculus results are obtained. In this way, N fractional calculus results can be obtained by performing L/N fractional calculus operations. N fractional calculus results are sent to a signal processing and display module, in which they are converted into a display data through a drawing thread, and the display data are sent to LCD for displaying, thus the fractional calculus operation and display of a input signal in a digital oscilloscope is realized.
    Type: Application
    Filed: November 1, 2021
    Publication date: November 24, 2022
    Applicant: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Bo XU, Kai CHEN, Libing BAI, Lulu TIAN, Hang GENG, Yuhua CHENG, Songting ZOU, Jia ZHAO, Yanjun YAN, Xiaoyu HUANG
  • Patent number: 11486901
    Abstract: A system maps and stores data in digital three-dimensional oscilloscope, wherein an ADC module has four ADC submodules. Four acquired waveform data are sent to an extraction module, and buffered in a FIFO module. When a trigger signal arrives, FIFO module outputs four extracted waveform data to a mapping address calculation module for calculating a mapping address and a RAM serial number for each point data, and the waveform data comparison and control module performs the reading and writing control of the 4×N dual port RAMs. When mapping number reaches a frame number, the RAM array module outputs its waveform probability values to the upper computer module to convert each value into RBG values, and the display module displays the waveforms of input signals of four channels on a screen according the RBG values.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: November 1, 2022
    Assignee: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Yuhua Cheng, Bo Xu, Kai Chen, Songting Zou, Libing Bai, Hang Geng, Yanjun Yan, Jia Zhao
  • Publication number: 20210215744
    Abstract: A system maps and stores data in digital three-dimensional oscilloscope, wherein an ADC module has four ADC submodules. Four acquired waveform data are sent to an extraction module, and buffered in a FIFO module. When a trigger signal arrives, FIFO module outputs four extracted waveform data to a mapping address calculation module for calculating a mapping address and a RAM serial number for each point data, and the waveform data comparison and control module performs the reading and writing control of the 4×N dual port RAMs. When mapping number reaches a frame number, the RAM array module outputs its waveform probability values to the upper computer module to convert each value into RBG values, and the display module displays the waveforms of input signals of four channels on a screen according the RBG values.
    Type: Application
    Filed: April 1, 2021
    Publication date: July 15, 2021
    Applicant: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Yuhua CHENG, Bo XU, Kai CHEN, Songting ZOU, Libing BAI, Hang GENG, Yanjun YAN, Jia ZHAO
  • Patent number: 10551350
    Abstract: The present invention provides a method for simulating magnetic flux leakage based on loop current, the magnetic distribution of a single loop current is obtained by solid angle, then the magnetic field distribution of a semi-infinite solenoid is obtained based on the assumption of arrangement of loop currents in the magnetized specimen, and its equation is given; and the JA hysteresis model is introduced to obtain the distribution of quasi-static magnetic flux leakage field, on the basis of analyzing the relation between the distribution of a loop current on the surface of the defect and the excitation magnetic field, the distribution of quasi-static magnetic flux leakage field is obtained based on the semi-infinite solenoid.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: February 4, 2020
    Assignee: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Yuhua Cheng, Libing Bai, Yonggang Wang, Jie Zhang, Chun Yin, Shuai Shi, Xue Chen
  • Publication number: 20180335403
    Abstract: The present invention provides a method for simulating magnetic flux leakage based on loop current, the magnetic distribution of a single loop current is obtained by solid angle, then the magnetic field distribution of a semi-infinite solenoid is obtained based on the assumption of arrangement of loop currents in the magnetized specimen, and its equation is given; and the JA hysteresis model is introduced to obtain the distribution of quasi-static magnetic flux leakage field, on the basis of analyzing the relation between the distribution of a loop current on the surface of the defect and the excitation magnetic field, the distribution of quasi-static magnetic flux leakage field is obtained based on the semi-infinite solenoid.
    Type: Application
    Filed: August 18, 2017
    Publication date: November 22, 2018
    Applicant: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Yuhua CHENG, Libing BAI, Yonggang WANG, Jie ZHANG, Chun YIN, Shuai SHI, Xue CHEN