Abstract: Disclosed is a surge control circuit, including: an absorption circuit including an absorption element and a bypass switch which are connected in series, a switch group connected in parallel to both ends of the absorption circuit and a first control circuit electrically connected to the switch group and bypass switch respectively. Normally, the first control circuit controls the switch group and the bypass switch to turn on simultaneously, makes the current flow through the switch group; when detecting the current is greater than or equal to the first preset current value, or the current increase rate is greater than or equal to the preset current rate of change, the first control circuit controls the switch group to turn off, makes the current flow through the absorption circuit; when detecting the current is less than the second preset current value, the first control circuit controls the bypass switch to turn off.

Abstract: Disclosed is a circuit breaker apparatus, including a first switching assembly, a first controller, a second switching assembly and a second controller. The first switching assembly is connected in series between a positive pole of a power supply and a load. The first switching assembly includes multiple first switching units in series. The first controller is electrically connected to a first pre-set reference potential of the first switching assembly. The first controller is electromagnetically coupled with each first switching unit through a first transformer unit. The second switching assembly is connected in series between a negative pole of the power supply and the load. The second switching assembly includes multiple second switching units in series. The second controller is electrically connected to a second pre-set reference potential of the second switching assembly. The second controller is electromagnetically coupled with each second switching unit through a second transformer unit.

Abstract: The present disclosure discloses a gate voltage control circuit of an IGBT and a control method thereof. The gate voltage control circuit of the IGBT comprises a voltage control circuit, an active clamping circuit and a power amplifier circuit. A control voltage outputted by the voltage control circuit indirectly controls a gate voltage of the IGBT, so as to achieve a better control of the gate voltage of the IGBT with a smaller loss. It may prevent the active clamping circuit from a too-early response and may increase the active clamping circuit response speed; and may avoid the voltage oscillation of the collector-emitter voltage Vce and the gate voltage Vge, and may improve the reliability of the IGBTs connected in series.

Abstract: The present disclosure discloses a gate voltage control circuit of an IGBT and a control method thereof. The gate voltage control circuit of the IGBT comprises a voltage control circuit, an active clamping circuit and a power amplifier circuit. A control voltage outputted by the voltage control circuit indirectly controls a gate voltage of the IGBT, so as to achieve a better control of the gate voltage of the IGBT with a smaller loss. It may prevent the active clamping circuit from a too-early response and may increase the active clamping circuit response speed; and may avoid the voltage oscillation of the collector-emitter voltage Vce and the gate voltage Vge, and may improve the reliability of the IGBTs connected in series.

Abstract: The present disclosure discloses a gate voltage control circuit of an IGBT and a control method thereof. The gate voltage control circuit of the IGBT comprises a voltage control circuit, an active clamping circuit and a power amplifier circuit. A control voltage outputted by the voltage control circuit indirectly controls a gate voltage of the IGBT, so as to achieve a better control of the gate voltage of the IGBT with a smaller loss. It may prevent the active clamping circuit from a too-early response and may increase the active clamping circuit response speed; and may avoid the voltage oscillation of the collector-emitter voltage Vce and the gate voltage Vge, and may improve the reliability of the IGBTs connected in series.

Abstract: The present disclosure discloses an active clamp circuit for a power semiconductor switch and a power converter using the same. The active clamp circuit includes: a discharging circuit, a first terminal of the discharging circuit being electrically connected to a collector of the power semiconductor switch; an unidirectional blocking circuit; a first voltage regulator diode connected in series with the unidirectional blocking circuit to form a series branch, a first terminal of the series branch being electrically connected to the collector of the power semiconductor switch; and a resistance-capacitance RC circuit, a first terminal of the RC circuit, a second terminal of the discharging circuit, and a second terminal of the serial circuit being electrically connected, a second terminal of the RC circuit being electrically coupled to a gate of the power semiconductor switch.

Abstract: The present disclosure discloses a gate voltage control circuit of an IGBT and a control method thereof. The gate voltage control circuit of the IGBT comprises a voltage control circuit, an active clamping circuit and a power amplifier circuit. A control voltage outputted by the voltage control circuit indirectly controls a gate voltage of the IGBT, so as to achieve a better control of the gate voltage of the IGBT with a smaller loss. It may prevent the active clamping circuit from a too-early response and may increase the active clamping circuit response speed; and may avoid the voltage oscillation of the collector-emitter voltage Vce and the gate voltage Vge, and may improve the reliability of the IGBTs connected in series.

Abstract: The present disclosure discloses a power conversion system and a method for suppressing the common-mode voltage. The power conversion system comprises a grid-side converter, a motor-side converter, a bus capacitor, a first reactor, a second reactor, and a third reactor. The bus capacitor is electrically connected between the grid-side converter and the motor-side converter. The first reactor includes a first terminal and a second terminal, wherein the first terminal is electrically connected to the motor-side converter. The second reactor includes a first terminal and a second terminal, wherein the first terminal is electrically connected to the second terminal of the first reactor and the second terminal of the second reactor is electrically connected to a motor. The third reactor includes a first terminal and a second terminal, wherein the first terminal is electrically connected to a grid and the second terminal is electrically connected to the grid-side converter.

Abstract: The present disclosure discloses a method of discharging a bus capacitor in a power converter, the method comprising: outputting a plurality of pulse control signals to the corresponding plurality of power semiconductor switch groups when the working state of the power converter is in a discharge state and the state of the main circuit breaker is open to control the ON and OFF of the plurality of power semiconductor switch groups, respectively, so as to form a discharge loop between the positive terminal and the negative terminal of the bus capacitor within at least a preset time, thereby causing the bus capacitor to discharge. Since a discharge loop is formed by the bus capacitor and the bridge arms and the energy of the bus capacitor is consumed by a power device, thereby the peak value and discharge rate of discharge current can be effectively controlled without adding additional discharge elements.

Abstract: A high-power conversion system includes a switching circuit and at least one reactor, the at least one reactor being electrically connected to the switching circuit, and the core of the at least one reactor being electrically connected to a potential point of the high-power conversion system.

Abstract: A high-power conversion system includes a switching circuit and at least one reactor, the at least one reactor being electrically connected to the switching circuit, and the core of the at least one reactor being electrically connected to a potential point of the high-power conversion system.

Abstract: The present disclosure discloses a power conversion system and a method for suppressing the common-mode voltage. The power conversion system comprises a grid-side converter, a motor-side converter, a bus capacitor, a first reactor, a second reactor, and a third reactor. The bus capacitor is electrically connected between the grid-side converter and the motor-side converter. The first reactor includes a first terminal and a second terminal, wherein the first terminal is electrically connected to the motor-side converter. The second reactor includes a first terminal and a second terminal, wherein the first terminal is electrically connected to the second terminal of the first reactor and the second terminal of the second reactor is electrically connected to a motor. The third reactor includes a first terminal and a second terminal, wherein the first terminal is electrically connected to a grid and the second terminal is electrically connected to the grid-side converter.

Abstract: A building fire situation awareness and evacuation support system includes a plurality of fire monitoring devices for monitoring development of a fire; a plurality of occupant monitoring devices for monitoring occupant distribution in different zones of the building; and a computation device in communication with the fire monitoring devices and occupant monitoring devices, the computation device estimating fire source location and a fire development trend in response to the fire monitoring devices and estimating occupant distributions in different zones of the building in response to the plurality of occupant monitoring devices; the computation device generating an evacuation strategy for occupants in response to the fire monitoring devices, occupant monitoring devices, estimated fire source location, estimated fire development trends, estimated occupant distributions and building structure information; wherein the evacuation strategy includes evacuation routes or evacuation directions.