Patents by Inventor Liguo JIANG

Liguo JIANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230409531
    Abstract: A method for real-time extraction of on-chip simulation information including acquiring simulation job information, and analyzing the simulation job information to obtain option and parameter information; and acquiring index information from a simulation project according to the option and the parameter information, and formatting the index information to obtain a simulation result. According to said method, key information of a simulation result is extracted in real time by performing text scanning and pattern analysis on a log file during a simulation process, so that a user can conveniently learn about the progress situation of the current simulation task at any time, and determine to continue or terminate the task at any time according to the current state and result situation, thereby more flexibly controlling a flow according to an actual situation, simplifying operations, increasing design efficiency, and compensating for the disadvantages of traditional simulation methods.
    Type: Application
    Filed: March 17, 2021
    Publication date: December 21, 2023
    Inventors: Liguo JIANG, Feng LING, Yeliang TANG, Wenliang DAI
  • Publication number: 20230385492
    Abstract: A method for reconstructing physical connection relationships of general EDA model layouts comprising: separately establishing interconnection relationships between stack layers in an EDA model, connection relationships of graphics on each stack layer, and connection relationships of graphics on interconnected stack layers; summarizing the connection relationships established, and then establishing connection relationships of all graphics of an overall EDA model; and separately establishing physical connection relationships of interconnected graphics in each group to obtain physical connection relationships of the overall EDA model layout.
    Type: Application
    Filed: March 16, 2021
    Publication date: November 30, 2023
    Inventors: Yunzhu DU, Feng LING, Wenliang DAI, Liguo JIANG, Yan LV, Zhichao GU