Abstract: An isolation coupling structure for transmitting a feedback signal between a secondary side and a primary side of a voltage conversion device includes a first dielectric layer including a first face and a second face opposite to the first face, a first coupling coil disposed on the first face enclosing to form an inner region; a second coupling coil configured to couple with the first coupling coil. The second coupling coil includes a first coil portion and a second coil portion, where the first coil portion is disposed on the second face, the second coil portion is disposed on the first face and located inside the inner region. The second coil portion is isolated from the first coupling coil, and the first coil portion and the second coil portion are electrically connected. The technical effect is that it can realize the electrical isolation and the coupling with low cost and small package size.

Abstract: An isolation coupling structure for transmitting a feedback signal between a secondary side and a primary side of a voltage conversion device includes a first dielectric layer including a first face and a second face opposite to the first face, a first coupling coil disposed on the first face enclosing to form an inner region; a second coupling coil configured to couple with the first coupling coil. The second coupling coil includes a first coil portion and a second coil portion, where the first coil portion is disposed on the second face, the second coil portion is disposed on the first face and located inside the inner region. The second coil portion is isolated from the first coupling coil, and the first coil portion and the second coil portion are electrically connected. The technical effect is that it can realize the electrical isolation and the coupling with low cost and small package size.

Abstract: A flip chip package structure includes a chip placed under a lead frame, a bump on the upper surface of the chip that is electrically connected to the lead of the lead frame, and a backside metal on the lower surface of the chip that is exposed outside an encapsulant encapsulating the chip and a portion of the lead frame.

Abstract: A multi-chip module package is provided, which includes a first chip mounted on via a first conductive adhesive and electrically connected to a first chip carrier, a second chip mounted on via a second conductive adhesive and electrically connected to a second chip carrier which is spaced apart from the first chip carrier, wherein the second conductive adhesive is made of an adhesive material the same as that of the first conductive material, a plurality of conductive elements to electrically connect the first chip to the second chip and an encapsulant encapsulating the first chip, the first chip carrier, the second chip, the second chip carrier and the plurality of conductive elements, allowing a portion of both chip carriers to be exposed to the encapsulant, so that the first chip and second chip are able to be insulated by the separation of the first and second chip carriers.

Abstract: A flip chip package structure includes a chip placed under a lead frame, a bump on the upper surface of the chip that is electrically connected to the lead of the lead frame, and a backside metal on the lower surface of the chip that is exposed outside an encapsulant encapsulating the chip and a portion of the lead frame.

Abstract: A multi-chip module package is provided, which includes a first chip mounted on via a first conductive adhesive and electrically connected to a first chip carrier, a second chip mounted on via a second conductive adhesive and electrically connected to a second chip carrier which is spaced apart from the first chip carrier, wherein the second conductive adhesive is made of an adhesive material the same as that of the first conductive material, a plurality of conductive elements to electrically connect the first chip to the second chip and an encapsulant encapsulating the first chip, the first chip carrier, the second chip, the second chip carrier and the plurality of conductive elements, allowing a portion of both chip carriers to be exposed to the encapsulant, so that the first chip and second chip are able to be insulated by the separation of the first and second chip carriers.