Abstract: An integrated circuit chip and a manufacturing method therefor, and a gate drive circuit, the integrated circuit chip comprising: a semiconductor substrate (103), a high voltage island (101a) being formed in the semiconductor substrate (103); a high voltage junction terminal (102a), the high voltage junction terminal (102a) surrounding the high voltage island (101a), a depletion type MOS device (N1) being formed on the high voltage junction terminal (102a), a gate electrode and a drain electrode of the depletion type MOS device (N1) being short connected, and a source electrode of the depletion type MOS device (N1) being connected to a high side power supply end (VB) of the integrated circuit chip; and a bipolar transistor (Q1), a collector electrode of the bipolar transistor (Q1) being short connected to the substrate and being connected to a low side power supply end (VCC) of the integrated circuit chip, an emitter of the bipolar transistor (Q1) being connected to a gate electrode of the depletion type MOS

Abstract: An integrated circuit chip and a manufacturing method therefor, and a gate drive circuit, the integrated circuit chip comprising: a semiconductor substrate (103), a high voltage island (101a) being formed in the semiconductor substrate (103); a high voltage junction terminal (102a), the high voltage junction terminal (102a) surrounding the high voltage island (101a), a depletion type MOS device (N1) being formed on the high voltage junction terminal (102a), a gate electrode and a drain electrode of the depletion type MOS device (N1) being short connected, and a source electrode of the depletion type MOS device (N1) being connected to a high side power supply end (VB) of the integrated circuit chip; and a bipolar transistor (Q1), a collector electrode of the bipolar transistor (Q1) being short connected to the substrate and being connected to a low side power supply end (VCC) of the integrated circuit chip, an emitter of the bipolar transistor (Q1) being connected to a gate electrode of the depletion type MOS

Abstract: A high-voltage Schottky diode and a manufacturing method thereof are disclosed in the present disclosure. The diode includes: a P-type substrate and two N-type buried layers, a first N-type buried layer is located below a cathode lead-out area, and a second N-type buried layer is located below a cathode region; an epitaxial layer; two N-type well regions located on the epitaxial layer, a first N-type well region is a lateral drift region and it is provided with a cathode lead-out region, and a second N-type well region is located on the second N-type buried layer and it is a cathode region; a first P-type well region located on the second N-type buried layer and surrounding the cathode region; a field oxide isolation region located on the lateral drift region; an anode located on the cathode region and a cathode located on the surface of the cathode lead-out region.

Abstract: A high-voltage Schottky diode and a manufacturing method thereof are disclosed in the present disclosure. The diode includes: a P-type substrate and two N-type buried layers, a first N-type buried layer is located below a cathode lead-out area, and a second N-type buried layer is located below a cathode region; an epitaxial layer; two N-type well regions located on the epitaxial layer, a first N-type well region is a lateral drift region and it is provided with a cathode lead-out region, and a second N-type well region is located on the second N-type buried layer and it is a cathode region; a first P-type well region located on the second N-type buried layer and surrounding the cathode region; a field oxide isolation region located on the lateral drift region; an anode located on the cathode region and a cathode located on the surface of the cathode lead-out region.