Abstract: A bias current generation circuit and a flash memory. The bias current generation circuit includes a voltage source, a switching circuit and a current generation circuit. The voltage source is configured to provide a voltage for generating a bias current. An input terminal of the switching circuit is connected to the voltage source, a control terminal of the switching circuit is configured to receive a control signal. The current generation circuit includes a first MOS transistor and a second MOS transistor, an input terminal and a control terminal of the first MOS transistor are connected to an output terminal of the switching circuit, an output terminal of the first MOS transistor is connected to an input terminal and a control terminal of the second MOS transistor, and an output terminal of the second MOS transistor is grounded.

Abstract: The present application relates to the field of pharmaceutical chemistry, relates to an SOS1 inhibitor containing phosphorus, i.e., a compound of formula (I) and a preparation method therefor, and a pharmaceutical composition containing the compound, and relates to use thereof in the preparation of a drug for treating a disease and/or disorder related to SOS1 or regulated by SOS1.

Abstract: An annotation tool generation method, an annotation method, an electronic device and a storage medium, related to the technical field of artificial intelligence such as automatic driving, intelligent transportation, computer vision, deep learning and the like, are provided. The method includes: acquiring a first function module generated based on a first language, wherein the first function module is configured for acquiring a file to be annotated; acquiring a second function module generated based on a second language; converting the second function module into a third function module in a webpage-oriented binary format, wherein the third function module is configured for presenting the file to be annotated on an annotation page and displaying an annotation result corresponding to the file to be annotated on the annotation page; and generating an annotation tool based on the first function module and the third function module.

Abstract: A bias current generation circuit and a flash memory. The bias current generation circuit includes a voltage source, a switching circuit and a current generation circuit. The voltage source is configured to provide a voltage for generating a bias current. An input terminal of the switching circuit is connected to the voltage source, a control terminal of the switching circuit is configured to receive a control signal. The current generation circuit includes a first MOS transistor and a second MOS transistor, an input terminal and a control terminal of the first MOS transistor are connected to an output terminal of the switching circuit, an output terminal of the first MOS transistor is connected to an input terminal and a control terminal of the second MOS transistor, and an output terminal of the second MOS transistor is grounded.

Abstract: An adaptive cruise control system includes an information acquisition unit having a main detector and a secondary detector, a control unit, and an execution unit. The main detector detects an object located ahead of the vehicle. The control unit determines whether control of the vehicle is required depending on an actual value determined by the main detector and the threshold value of a system property characterizing the driving environment. The execution unit controls the vehicle. The secondary detector is arranged such that its field of view for detecting an object located at an angle ahead of the vehicle covers the boundary of the main detector's field of view, and which is oriented outwards in relation to the forward direction of the vehicle. The secondary detector sends an indication signal to adjust the threshold value of the system property when an object is detected.

Abstract: An annotation tool generation method, an annotation method, an electronic device and a storage medium, related to the technical field of artificial intelligence such as automatic driving, intelligent transportation, computer vision, deep learning and the like, are provided. The method includes: acquiring a first function module generated based on a first language, wherein the first function module is configured for acquiring a file to be annotated; acquiring a second function module generated based on a second language; converting the second function module into a third function module in a webpage-oriented binary format, wherein the third function module is configured for presenting the file to be annotated on an annotation page and displaying an annotation result corresponding to the file to be annotated on the annotation page; and generating an annotation tool based on the first function module and the third function module.

Abstract: The semi-solid molding method of the present invention comprises six parts as the traditional method: a mold, a main machine, an injection system, a pulping machine, a quantitative feeding system, and a holding furnace; the injection system, the pulping machine, and the quantitative feeding system are combined and called integrated pulping injection system, and the system is placed in the holding furnace. In order to adapt to the difficulty of molding the semi-solid slurry to carry less heat into the mold with large wall thickness, the semi-solid mold is divided into three layers according to the function, which greatly reduces the heat absorption capacity of the mold, due to the characteristics of the constant flow pump, the holding pressure after filling can reach 0.01 MPa-30 MPa, so low pressure casting, high pressure casting, differential pressure casting, liquid die forging and semi-solid extrusion forging can be unified in one kind of main machine.

Abstract: The present invention is applicable to the field of error correction coding, and provides a circuit, an encoder and a method for parallel BCH coding. The method comprises: performing an XOR operation on input sequences {m(p?1), m(p?2), . . . , m(0)} in a current period in sequence corresponding to output upper bits of the previous period of a register separately, outputting operation results as selection signals to a selector, selecting P constant-multinomials {xr<<0) mod g(x), (xr<<1) mod g(x), . . . , (xr<<(p?1)) mod g(x)} with 0 separately in sequence, shifting the selection results and the output of the previous period of the register in P bits towards the upper bits and outputting the selection results, summing the selection results and outputting the sum to the register to serve as an output of the current period of the register; the above steps are repeated specific times to obtain final code output.

Abstract: The present invention is applicable to the field of error correction coding, and provides a circuit, an encoder and a method for parallel BCH coding. The method comprises: performing an XOR operation on input sequences {m(p?1), m(p?2), . . . , m(0)} in a current period in sequence corresponding to output upper bits of the previous period of a register separately, outputting operation results as selection signals to a selector, selecting P constant-multinomials {xr<<0) mod g(x), (xr<<1) mod g(x), . . . , (xr<<(p?1)) mod g(x)} with 0 separately in sequence, shifting the selection results and the output of the previous period of the register in P bits towards the upper bits and outputting the selection results, summing the selection results and outputting the sum to the register to serve as an output of the current period of the register; the above steps are repeated specific times to obtain final code output.