Abstract: A method for treating mixed wastewater from pharmaceutical chemical industry parks including introducing mixed wastewater into a regulation tank for regulation of water flow and water quality, and then into a hydrolysis tank having a hanged filler and employing upflow water distribution, into an anaerobic tank employing upflow water distribution, into a moving bed biofilm reactor having a suspended filler and an aeration device at the bottom thereof, into a biological aerated filter including a ceramic filler, and finally treating using coagulating precipitation process. The final effluent has less than 100 mg/L COD.

Abstract: A method for the treatment of waste water from florfenicol production is provided, which mainly comprises the steps as follows: adding iron chips or steel slag to waste water from a copper salt workshop, regulating the pH value, filtering, then adding limestone, lime or Ca(OH)2 and having a solid-liquid separation; blending the treated waste water and waste water from a splitting workshop, oxidizing the residual reductive matter by ozone and removing NH3-N by blowing; blending the treated water and waste water from esterifying or florfenicol workshops and diluting the blended water, adding phosphate and microelement, regulating the pH value, then having an anaerobic treatment in an anaerobic reactor; diluting the treated waste water, then having an aerobic treatment in an aerobic reactor.

Abstract: A technique for forming a high-performance sub-half micron MOS transistor is disclosed which has improved short channel characteristics without degradation of device performance. The transistor comprises a semiconductor substrate, a gate electrode, graded source and drain impurity regions, a first set of gate sidewall spacers, and a second set of gate sidewall spacers. The graded source and drain impurity regions comprise a relatively linear continuum of doped regions, ranging from lightly doped (LDD) regions, to moderately doped (MDD) regions, to heavily doped regions. Additionally, the transistor may include a punch through barrier region located within the substrate under the gate electrode. With these features, the transistor of the present invention allows for more precise control of conduction channel length without degradation of either (1) body factor and current drive, and/or (2) junction leakage, and without compromising hot carrier immunity.

Abstract: A system and method for reducing the contact resistance associated with tungsten plug contacts to P-doped diffusion regions of a semiconductor device. Before or during the formation of the tungsten plug contacts, a high energy, low dosage of an N-dopant or neutral species such as silicon or germanium is implanted into the P-doped diffusion regions of the semiconductor device. The implantation causes lattice damage within the P-doped diffusion regions, enhancing diffusion of the P-dopant within the P-doped diffusion regions. This results in the P-dopant diffusing toward the contact, replacing dopant lost to segregation into the contact metalization, and thus reducing the contact resistance.

Abstract: A transistor is formed which has improved hot carrier immunity. On a substrate, between two source/drain regions, a gate region is formed over a dielectric region. An implant is used to dope the source/drain regions. After doping the source/drain regions, a tilted angle nitrogen implant is performed to implant nitrogen into areas of the dielectric region overlaying the drain/source regions of the transistor. The tilted angle nitrogen implant may be performed before or after forming spacer regions on sides of the gate region.