Abstract: Embodiments of an apparatus and methods of forming a package on package interconnect and its application to the packaging of microelectronic devices are described herein. Other embodiments may be described and claimed.

Abstract: Embodiments of an apparatus and methods of forming a package on package interconnect and its application to the packaging of microelectronic devices are described herein. Other embodiments may be described and claimed.

Abstract: A polymer coating material is disposed at a surface of a semiconductor substrate, superimposing a readable mark formed thereupon. A perimeter of the coating material is configured to correspond approximately with a perimeter of the mark, and a thickness of the coating material is configured to be relatively conformal with the surface of the substrate. The mark remains readable through the coating material throughout manufacturing, reliability testing, and normal use. A substrate so formed may constitute a portion of an assembly and/or system (e.g., computer system). Throughout manufacturing, reliability testing and normal use, a readable mark provides product identification, traceability, and other benefits.