Abstract: Methods, systems, apparatus for wireless communication are described. A method of wireless communication is provided to include performing, by a first node of an integrated access and backhaul (IAB) network, a data transmission with a second node in the IAB. In addition, apparatus for implementing the method is also described.

Abstract: The present invention provides a conjugated diene based rubber comprising a conjugated diene based copolymer comprising at least two conjugated diene monomer units and optionally comprising a vinyl aromatic hydrocarbon monomer unit, wherein the conjugated diene based copolymer comprises a first block composed of a first conjugated diene monomer unit and the vinyl aromatic hydrocarbon monomer unit or a second conjugated diene monomer unit, the second conjugated diene monomer unit being distinct from the first conjugated diene monomer unit, the first block being random; and a second block, comprising at least the second conjugated diene monomer unit and optionally comprising the vinyl aromatic hydrocarbon monomer unit, wherein the first block is connected to the second block, and the amount of the vinyl aromatic hydrocarbon monomer units or the second conjugated diene monomer units is at least 35 wt % of the first block.

Abstract: Semiconductor devices and methods of manufacture are discussed. In an embodiment, a method of manufacturing a semiconductor device includes: forming first nanostructures from a first material over a substrate; forming second nanostructures from a second material different from the first material over the substrate, wherein the first nanostructures and the second nanostructures alternate vertically above the substrate; removing the first nanostructures; after the removing the first nanostructures forming an interposer in between the second nanostructures; after the forming the interposer forming a first source/drain region over the substrate and in direct physical contact with the second nanostructures; and removing the interposer exposing surfaces of each of the second nanostructures.

Abstract: A surgical instrument includes a rod and a push portion. The push portion includes a first end connected to an end of the rod and a second end having a blade portion. The push portion includes a plurality of grooves. The plurality of grooves is recessed in a surface of the push portion and is spaced from each other. Each two adjacent grooves has a rib formed therebetween. A top face of a cross section of each rib is the surface of the push portion. Each rib has a guiding face on the cross section of the push portion. The guiding face is connected to the surface of the push portion. The guiding face faces a rotating direction of the rod. An angle between the guiding face and the surface of the push portion in the cross section is greater than 90°.

Abstract: A flexible strain sensor comprises a sensing area, a connection area, an encapsulation layer and a flexible substrate. The sensing area and the connection area are made of the same conductive material by adjusting size structures of different areas. The sensor is prepared by performing one-step printing of carbon black-silicone rubber composite conductive paste on a fabric substrate on the basis of a screen printing process. The method is simple and convenient to operate, is low in manufacturing cost and is suitable for large-scale production; and the prepared sensor has a high sensitivity (?10), a large strain range(˜100%), a low hysteresis quality and a good stability, and can be applied to the fields of human body motion detection, intelligent medical service, etc. The method for preparing a sensor in the present invention has important reference value for industrial production of a flexible strain sensor.

Abstract: Gate cutting techniques disclosed herein form gate isolation fins to isolate metal gates of multigate devices from one another before forming the multigate devices, and in particular, before forming the metal gates of the multigate devices. An exemplary device includes a first multigate device having first source/drain features and a first metal gate that surrounds a first channel layer and a second multigate device having second source/drain features and a second metal gate that surrounds a second channel layer. A gate isolation fin, which separates the first metal gate and the second metal gate, includes a first dielectric layer having a first dielectric constant and a second dielectric layer having a second dielectric constant disposed over the first dielectric layer. The second dielectric constant is less than the first dielectric constant. A gate isolation end cap may be disposed on the gate isolation fin to provide additional isolation.

Abstract: Systems, apparatus and methods are provided for power management of non-volatile storage (NVM) systems. A non-volatile storage system may include a first interface to be coupled to a host, a NVM device, a storage controller including a command queue and a processor, and a second interface coupling the storage controller and the NVM device. The processor may be configured to handle data transfer requests from the host in an active power state, monitor the command queue and a data transfer rate on the first interface, determine that the data transfer rate falls below a predetermined threshold and the command queue is empty, enter a pseudo-idle power state, determine that there is a new command from the host, and exit the pseudo-idle power state and enter the active power state.

Abstract: A semiconductor device and method of manufacture are provided. After a patterning of a middle layer, the middle layer is removed. In order to reduce or prevent damage to other underlying layers exposed by the patterning of the middle layer and intervening layers, an inhibitor is included within an etching process in order to inhibit the amount of material removed from the underlying layers.

Abstract: A transaction harmony degree-based method and system for transaction matching between a power grid and building energy. The method includes: obtaining a transaction harmony degree of a historical transaction cycle; sending, by using a blockchain, the transaction harmony degree to a corresponding building energy user, and sending a maximum compensated electricity price and an expected compensated electricity price in peak-valley regulation to all building energy users; determining, by each building energy user, a transaction-based compensated electricity price in the peak-valley regulation based on the received transaction harmony degree and the received maximum compensated electricity price and expected compensated electricity price in the peak-valley regulation, and feeding back the transaction-based compensated electricity price in the peak-valley regulation to a power grid; and determining, by the power grid, a building energy user that successfully performs transaction matching with the power grid.

Abstract: A multi-wavelength light source includes a laser, an optical modulator, an optical mixer, an optical demultiplexer, and an optical power adjuster that are sequentially coupled. The laser is configured to generate a first optical signal. The optical modulator modulates the first optical signal, to generate a second optical signal, where the second optical signal includes at least two wavelength components. The optical mixer mixes frequencies based on the at least two wavelength components to generate a third optical signal, where the third optical signal includes at least four wavelength components. The demultiplexer separates the at least four wavelength components. The optical power adjuster adjusts, based on a specified power threshold, a power of each of the wavelength components obtained by separation by the demultiplexer.

Abstract: Disclosed herein are related to an integrated circuit to regulate a supply voltage. In one aspect, the integrated circuit includes a metal rail including a first point, at which a first functional circuit is connected, and a second point, at which a second functional circuit is connected. In one aspect, the integrate circuit includes a voltage regulator coupled between the first point of the metal rail and the second point of the metal rail. In one aspect, the voltage regulator senses a voltage at the second point of the metal rail and adjusts a supply voltage at the first point of the metal rail, according to the sensed voltage at the second point of the metal rail.

Abstract: A RF module and an electronic device. The RF module includes a RF transceiver module; a first antenna configured to transmit a first transmission signal, and receive a first main reception signal and a second diversity reception signal; a first triplexer connected to the RF transceiver module and the first antenna, and being configured to isolate the first transmission signal, the first main reception signal, and the second diversity reception signal; a second antenna configured to transmit a second transmission signal, receive a second main reception signal and a first diversity reception signal, and a frequency band of the first transmission signal being different from that of the second transmission signal; and a second triplexer connected to the RF transceiver module and the second antenna, and being configured to isolate the second transmission signal, the second main reception signal, and the first diversity reception signal.

Abstract: One or more video gateway devices configured to: access pre-configured criteria including at least a first condition, a second condition, and a first event; access video content captured by cameras configured to capture video of areas of a manufacturing facility; determine, based on an analysis of the video content, that the first condition is satisfied; access sensor data from one or more sensors; determine, based on an analysis of the sensor data, that the second condition is satisfied; and based on determining that the first and second conditions are satisfied, cause the first event to be executed.

Abstract: Some embodiments relate to a method for forming an integrated chip, the method includes forming a first conductive wire and a second conductive wire over a substrate. A dielectric structure is formed laterally between the first conductive wire and the second conductive wire. The dielectric structure comprises a first dielectric liner, a dielectric layer disposed between opposing sidewalls of the first dielectric liner, and a void between an upper surface of the first dielectric liner and a lower surface of the dielectric layer. A dielectric capping layer is formed along an upper surface of the dielectric structure. Sidewalls of the dielectric capping layer are aligned with sidewalls of the dielectric structure.

Abstract: A test circuit includes a scan chain and a wrapper chain. The wrapper chain shifts in a test pattern according a first clock. The scan chain is coupled to the wrapper chain via a logic combination of a circuit under test. The wrapper chain is configured to transmit the test pattern to the scan chain via the logic combination according to a second clock in a capture phase. The wrapper chain includes a first, a second wrapper cell, and an asynchronous register. The first wrapper cell sequentially shifts in two bits of the test pattern in the shift-in phase. The second wrapper cell shifts in the first bit of the test pattern in the shift-in phase. The asynchronous register conducts the first wrapper cell to the second wrapper cell in the shift-in phase, and latches the second wrapper cell in the capture phase.

Abstract: A grid structure in a pixel array may be at least partially angled or tapered toward a top surface of the grid structure such that the width of the grid structure approaches a near-zero width near the top surface of the grid structure. This permits the spacing between color filter regions in between the grid structure to approach a near-zero spacing near the top surfaces of the color filter regions. The tight spacing of color filter regions provided by the angled or tapered grid structure provides a greater surface area and volume for incident light collection in the color filter regions. Moreover, the width of the grid structure may increase at least partially toward a bottom surface of the grid structure such that the wider dimension of the grid structure near the bottom surface of the grid structure provides optical crosstalk protection for the pixel sensors in the pixel array.

Abstract: A method for fabricating a semiconductor device includes the steps of forming a gate structure on a substrate, forming recesses adjacent to two sides of the gate structure, forming a buffer layer in the recesses, forming a first linear bulk layer on the buffer layer, forming a second linear bulk layer on the first linear bulk layer, forming a bulk layer on the second linear bulk layer, and forming a cap layer on the bulk layer.

Abstract: The disclosure provides a vinyl-containing aromatic alicyclic copolymer, a resin composition and a product thereof. The resin composition includes the vinyl-containing aromatic alicyclic copolymer, and the product made of the resin composition has a Tg of greater than 200° C., a dielectric constant Dk (10 GHz) of less than 3.0 and a dielectric loss Df (10 GHz) of less than 0.0014.

Abstract: A splicing display panel and a splicing display device are provided. The splicing display panel includes at least two spliced first display modules and at least one second display module. There is a seam between two adjacent first display modules. A portion of the first display module corresponding to a bezel area is provided with an accommodating slot. The accommodating slot of one of the first display modules is spliced with the accommodating slot of another one of the first display modules to form an accommodating cavity. The at least one second display module is arranged in the accommodating cavity, and the second display module covers the seam.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The method includes forming a first dielectric feature between first and the second fin structures, wherein each first and second fin structure includes first semiconductor layers and second semiconductor layers alternatingly stacked and in contact with the first dielectric layer. The method also includes removing the second semiconductor layers so that the first semiconductor layers of the first and second fin structures extend laterally from a first side and a second side of the first dielectric feature, respectively, trimming the first dielectric feature so that the first dielectric feature has a reduced thickness on both first and the second sides, and forming a gate electrode layer to surround each of the first semiconductor layers of the first and second fin structures.