Patents by Inventor Lin Ching-Huang
Lin Ching-Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10964547Abstract: A method of fabricating a semiconductor structure including the following steps is provided. A mask layer is formed on a semiconductor substrate. The semiconductor substrate revealed by the mask layer is anisotropically etched until a cavity is formed in the semiconductor substrate, wherein anisotropically etching the semiconductor substrate revealed by the mask layer comprises performing a plurality of first cycles and performing a plurality of second cycles after performing the first cycles, each cycle among the first and second cycles respectively includes performing a passivating step and performing an etching step after performing the passivating step. During the first cycles, a first duration ratio of the etching step to the passivating step is variable and ramps up step by step. During the second cycles, a second duration ratio of the etching step to the passivating step is constant, and the first duration ratio is less than the second duration ratio.Type: GrantFiled: November 25, 2019Date of Patent: March 30, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chin-Han Meng, Chih-Hsien Hsu, Jr-Sheng Chen, An-Chi Li, Lin-Ching Huang, Yu-Pei Chiang
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Patent number: 10957516Abstract: A multi-zone gas distribution plate (GDP) for high uniformity in plasma-based etching is provided. A housing defines a process chamber and comprises a gas inlet configured to receive a process gas. A GDP is arranged in the process chamber and is configured to distribute the process gas within the process chamber. The GDP comprises a plurality of holes extending through the GDP, and further comprises a plurality of zones into which the holes are grouped. The zones comprise a first zone and a second zone. Holes of the first zone share a first cross-sectional profile and holes of the second zone share a second cross-sectional profile different than the first cross-sectional profile. A method for designing the multi-zone GDP is also provided.Type: GrantFiled: June 5, 2018Date of Patent: March 23, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chin-Han Meng, Jr-Sheng Chen, Yin-Tun Chou, Chih-Hua Chan, Lin-Ching Huang, Yu-Pei Chiang
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Patent number: 10654713Abstract: Methods for manufacturing MEMS structures are provided. The method for manufacturing a microelectromechanical system (MEMS) structure includes etching a MEMS substrate to form a first trench and a second trench and etching the MEMS substrate through the first trench and the second trench to form a first through hole and an extended second trench. The method for manufacturing a MEMS structure further includes etching the MEMS substrate through the extended second trench to form a second through hole. In addition, a height of the first trench is greater than ¾ of a height of the MEMS substrate, and a height of the second trench is smaller than ? of the height of the MEMS substrate.Type: GrantFiled: April 29, 2019Date of Patent: May 19, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chin-Han Meng, Jr-Sheng Chen, Chih-Hsien Hsu, Yu-Pei Chiang, Lin-Ching Huang
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Publication number: 20200098583Abstract: A method of fabricating a semiconductor structure including the following steps is provided. A mask layer is formed on a semiconductor substrate. The semiconductor substrate revealed by the mask layer is anisotropically etched until a cavity is formed in the semiconductor substrate, wherein anisotropically etching the semiconductor substrate revealed by the mask layer comprises performing a plurality of first cycles and performing a plurality of second cycles after performing the first cycles, each cycle among the first and second cycles respectively includes performing a passivating step and performing an etching step after performing the passivating step. During the first cycles, a first duration ratio of the etching step to the passivating step is variable and ramps up step by step. During the second cycles, a second duration ratio of the etching step to the passivating step is constant, and the first duration ratio is less than the second duration ratio.Type: ApplicationFiled: November 25, 2019Publication date: March 26, 2020Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chin-Han Meng, Chih-Hsien Hsu, Jr-Sheng Chen, An-Chi Li, Lin-Ching Huang, Yu-Pei Chiang
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Patent number: 10529578Abstract: A method of fabricating a semiconductor structure including the following steps is provided. A mask layer is formed on a semiconductor substrate. The semiconductor substrate revealed by the mask layer is anisotropically etched until a cavity is formed in the semiconductor substrate, wherein anisotropically etching the semiconductor substrate revealed by the mask layer comprises performing a plurality of first cycles and performing a plurality of second cycles after performing the first cycles, each cycle among the first and second cycles respectively includes performing a passivating step and performing an etching step after performing the passivating step. During the first cycles, a first duration ratio of the etching step to the passivating step is variable and ramps up step by step. During the second cycles, a second duration ratio of the etching step to the passivating step is constant, and the first duration ratio is less than the second duration ratio.Type: GrantFiled: October 30, 2018Date of Patent: January 7, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chin-Han Meng, Chih-Hsien Hsu, Jr-Sheng Chen, An-Chi Li, Lin-Ching Huang, Yu-Pei Chiang
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Publication number: 20190256350Abstract: Methods for manufacturing MEMS structures are provided. The method for manufacturing a microelectromechanical system (MEMS) structure includes etching a MEMS substrate to form a first trench and a second trench and etching the MEMS substrate through the first trench and the second trench to form a first through hole and an extended second trench. The method for manufacturing a MEMS structure further includes etching the MEMS substrate through the extended second trench to form a second through hole. In addition, a height of the first trench is greater than ¾ of a height of the MEMS substrate, and a height of the second trench is smaller than ? of the height of the MEMS substrate.Type: ApplicationFiled: April 29, 2019Publication date: August 22, 2019Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chin-Han MENG, Jr-Sheng CHEN, Chih-Hsien HSU, Yu-Pei CHIANG, Lin-Ching HUANG
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Publication number: 20190148161Abstract: A method of fabricating a semiconductor structure including the following steps is provided. A mask layer is formed on a semiconductor substrate. The semiconductor substrate revealed by the mask layer is anisotropically etched until a cavity is formed in the semiconductor substrate, wherein anisotropically etching the semiconductor substrate revealed by the mask layer comprises performing a plurality of first cycles and performing a plurality of second cycles after performing the first cycles, each cycle among the first and second cycles respectively includes performing a passivating step and performing an etching step after performing the passivating step. During the first cycles, a first duration ratio of the etching step to the passivating step is variable and ramps up step by step. During the second cycles, a second duration ratio of the etching step to the passivating step is constant, and the first duration ratio is less than the second duration ratio.Type: ApplicationFiled: October 30, 2018Publication date: May 16, 2019Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chin-Han Meng, Chih-Hsien Hsu, Jr-Sheng Chen, An-Chi Li, Lin-Ching Huang, Yu-Pei Chiang
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Patent number: 10273152Abstract: Methods for manufacturing MEMS structures are provided. The method includes forming a first trench and a second trench in a MEMS substrate by performing a main etching process and etching the MEMS substrate through the first trench and the second trench to form a first through hole and an extended second trench by performing a first step of an over-etching process. The method further includes etching the MEMS substrate through the extended second trench to form a second through hole by performing a second step of the over-etching process. In addition, a width of the first trench is greater than a width of the second trench, and a height of the first trench is greater than ¾ of a height of the MEMS substrate, and a height of the second trench is smaller than ? of the MEMS substrate.Type: GrantFiled: January 31, 2018Date of Patent: April 30, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chin-Han Meng, Jr-Sheng Chen, Chih-Hsien Hsu, Yu-Pei Chiang, Lin-Ching Huang
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Publication number: 20190092625Abstract: Methods for manufacturing MEMS structures are provided. The method includes forming a first trench and a second trench in a MEMS substrate by performing a main etching process and etching the MEMS substrate through the first trench and the second trench to form a first through hole and an extended second trench by performing a first step of an over-etching process. The method further includes etching the MEMS substrate through the extended second trench to form a second through hole by performing a second step of the over-etching process. In addition, a width of the first trench is greater than a width of the second trench, and a height of the first trench is greater than ¾ of a height of the MEMS substrate, and a height of the second trench is smaller than ? of the MEMS substrate.Type: ApplicationFiled: January 31, 2018Publication date: March 28, 2019Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chin-Han MENG, Jr-Sheng CHEN, Chih-Hsien HSU, Yu-Pei CHIANG, Lin-Ching HUANG
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Patent number: 10131539Abstract: A method for forming a micro-electro-mechanical system (MEMS) device structure is provided. The method includes forming a second substrate over a first substrate, and a cavity is formed between the first substrate and the second substrate. The method includes forming a hole through the second substrate using an etching process, and the hole is connected to the cavity. The etching process includes a plurality of etching cycles, and each of the etching cycles includes an etching step, and the etching step has a first stage and a second stage. The etching time of each of the etching steps during the second stage is gradually increased as the number of etching cycles is increased.Type: GrantFiled: October 5, 2017Date of Patent: November 20, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chin-Han Meng, Chih-Hsien Hsu, Chia-Chi Chung, Yu-Pei Chiang, Wen-Chih Chen, Chen-Huang Huang, Zhi-Sheng Xu, Jr-Sheng Chen, Kuo-Chin Liu, Lin-Ching Huang
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Publication number: 20180286634Abstract: A multi-zone gas distribution plate (GDP) for high uniformity in plasma-based etching is provided. A housing defines a process chamber and comprises a gas inlet configured to receive a process gas. A GDP is arranged in the process chamber and is configured to distribute the process gas within the process chamber. The GDP comprises a plurality of holes extending through the GDP, and further comprises a plurality of zones into which the holes are grouped. The zones comprise a first zone and a second zone. Holes of the first zone share a first cross-sectional profile and holes of the second zone share a second cross-sectional profile different than the first cross-sectional profile. A method for designing the multi-zone GDP is also provided.Type: ApplicationFiled: June 5, 2018Publication date: October 4, 2018Inventors: Chin-Han Meng, Jr-Sheng Chen, Yin-Tun Chou, Chih-Hua Chan, Lin-Ching Huang, Yu-Pei Chiang
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Patent number: 9997336Abstract: A multi-zone gas distribution plate (GDP) for high uniformity in plasma-based etching is provided. A housing defines a process chamber and comprises a gas inlet configured to receive a process gas. A GDP is arranged in the process chamber and is configured to distribute the process gas within the process chamber. The GDP comprises a plurality of holes extending through the GDP, and further comprises a plurality of zones into which the holes are grouped. The zones comprise a first zone and a second zone. Holes of the first zone share a first cross-sectional profile and holes of the second zone share a second cross-sectional profile different than the first cross-sectional profile. A method for designing the multi-zone GDP is also provided.Type: GrantFiled: April 26, 2016Date of Patent: June 12, 2018Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chin-Han Meng, Jr-Sheng Chen, Yin-Tun Chou, Chih-Hua Chan, Lin-Ching Huang, Yu-Pei Chiang
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Publication number: 20180148324Abstract: A method for forming a micro-electro-mechanical system (MEMS) device structure is provided. The method includes forming a second substrate over a first substrate, and a cavity is formed between the first substrate and the second substrate. The method includes forming a hole through the second substrate using an etching process, and the hole is connected to the cavity. The etching process includes a plurality of etching cycles, and each of the etching cycles includes an etching step, and the etching step has a first stage and a second stage. The etching time of each of the etching steps during the second stage is gradually increased as the number of etching cycles is increased.Type: ApplicationFiled: October 5, 2017Publication date: May 31, 2018Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chin-Han MENG, Chih-Hsien HSU, Chia-Chi CHUNG, Yu-Pei CHIANG, Wen-Chih CHEN, Chen-Huang HUANG, Zhi-Sheng XU, Jr-Sheng CHEN, Kuo-Chin LIU, Lin-Ching HUANG
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Publication number: 20170309500Abstract: A multi-zone gas distribution plate (GDP) for high uniformity in plasma-based etching is provided. A housing defines a process chamber and comprises a gas inlet configured to receive a process gas. A GDP is arranged in the process chamber and is configured to distribute the process gas within the process chamber. The GDP comprises a plurality of holes extending through the GDP, and further comprises a plurality of zones into which the holes are grouped. The zones comprise a first zone and a second zone. Holes of the first zone share a first cross-sectional profile and holes of the second zone share a second cross-sectional profile different than the first cross-sectional profile. A method for designing the multi-zone GDP is also provided.Type: ApplicationFiled: April 26, 2016Publication date: October 26, 2017Inventors: Chin-Han Meng, Jr-Sheng Chen, Yin-Tun Chou, Chih-Hua Chan, Lin-Ching Huang, Yu-Pei Chiang
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Publication number: 20040223314Abstract: The purpose of the present invention is to provide a flat lighting structure for a light source of a liquid crystal display (LCD). The flat lighting structure includes a light guide plate having a side, a light guide stick having two ends and disposed by the side of the light guide plate, and a first luminary and a second luminary disposed at the two ends of the light guide stick for providing a light, wherein the light guide stick further comprises a light guide concave disposed between the first luminary and the second luminary for guiding the light toward the light guide plate.Type: ApplicationFiled: December 31, 2003Publication date: November 11, 2004Applicant: Toppoly Optoelectronics Corp.Inventors: Lin Ching-Huang, Mai Che-Kuei