Abstract: A lithography method is provided in accordance with some embodiments. The lithography method includes forming a surface modification layer on a substrate, the surface modification layer including a hydrophilic top surface; coating a photoresist layer on the surface modification layer; and developing the photoresist layer, thereby forming a patterned photoresist layer.

Abstract: A lithography method is provided in accordance with some embodiments. The lithography method includes forming a surface modification layer on a substrate, the surface modification layer including a hydrophilic top surface; coating a photoresist layer on the surface modification layer; and developing the photoresist layer, thereby forming a patterned photoresist layer.

Abstract: A lithography apparatus includes an imaging lens module; a substrate table positioned underlying the imaging lens module and configured to hold a substrate; a fluid retaining module configured to hold a fluid in a space between the imaging lens module and a substrate on the substrate stage; and a heating element configured in the fluid retaining module and adjacent to the space. The heating element includes at least two of following: a sealant insoluble to the fluid for sealing the heating element in the fluid retaining module; a sealed opening configured in one of top portion and side portion of the fluid retaining module for sealing the heating element in the fluid retaining module; and/or a non-uniform temperature compensation device configured with the heating element.

Abstract: A lithography process to pattern a plurality of fields on a substrate is disclosed. The process includes scanning a first field along a first direction using a radiation beam. Thereafter, the processes steps to a second field adjacent the first field and located behind the first field when the first and second fields are viewed along the first direction. The second field is then scanned along the first direction using the radiation beam.

Abstract: A method for photolithography processing includes providing a substrate coated with a photosensitive layer thereon and a top coater overlying the photosensitive layer; exposing the photosensitive layer to a radiation energy; removing the top coater; and baking the photosensitive layer after the removing of the top coater layer.

Abstract: A lithography process to pattern a plurality of fields on a substrate is disclosed. The process includes scanning a first field along a first direction using a radiation beam. Thereafter, the processes steps to a second field adjacent the first field and located behind the first field when the first and second fields are viewed along the first direction. The second field is then scanned along the first direction using the radiation beam.

Abstract: A lithography apparatus includes an imaging lens module; a substrate table positioned underlying the imaging lens module and configured to hold a substrate; a fluid retaining module configured to hold a fluid in a space between the imaging lens module and a substrate on the substrate stage; and a heating element configured in the fluid retaining module and adjacent to the space. The heating element includes at least one of following: a sealant insoluble to the fluid for sealing the heating element in the fluid retaining module; a sealed opening configured in one of top portion and side portion of the fluid retaining module for sealing the heating element in the fluid retaining module; and/or a non-uniform temperature compensation device configured with the heating element.

Abstract: A vertical nanotube transistor and a process for fabricating the same. First, a source layer and a catalyst layer are successively formed on a substrate. A dielectric layer is formed on the catalyst layer and the substrate. Next, the dielectric layer is selectively removed to form a first dielectric mesa, a gate dielectric layer spaced apart from the first dielectric mesa by a first opening, and a second dielectric mesa spaced apart from the gate dielectric layer by a second opening. Next, a nanotube layer is formed in the first opening. Finally, a drain layer is formed on the nanotube layer and the first dielectric mesa, and a gate layer is formed in the second opening. The formation position of the nanotubes can be precisely controlled.