Patents by Inventor Lin-Jung Wu
Lin-Jung Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240079758Abstract: An electronic device includes a metal back cover, a metal frame, and a first, second, third, and fourth radiators. The metal frame includes a discrete part and two connection parts. The connection parts are located by two sides of the discrete part, separated from the discrete part, and connected to the metal back cover. A U-shaped slot is formed between the discrete part and the metal back cover and between the discrete part and the connection parts. The first radiator is separated from the discrete part and includes a feed end. The second, third, and fourth radiators are connected to the discrete part and the metal back cover. The third radiator is located between the first and second radiators. The first radiator is located between the third and fourth radiators. The discrete part and the first, second, third, and fourth radiators form an antenna module together.Type: ApplicationFiled: August 2, 2023Publication date: March 7, 2024Applicant: PEGATRON CORPORATIONInventors: Chien-Yi Wu, Chao-Hsu Wu, Chih-Wei Liao, Hau Yuen Tan, Shih-Keng Huang, Wen-Hgin Chuang, Lin-Hsu Chiang, Chang-Hua Wu, Han-Wei Wang, Chun-Jung Hu
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Patent number: 10763179Abstract: An example semiconductor wafer includes a semiconductor layer, a dielectric layer disposed on the semiconductor layer, and a layer of the metal disposed on the dielectric layer. An example method of determining an effective work function of a metal on the semiconductor wafer includes determining a surface barrier voltage of the semiconductor wafer, and determining a metal effective work function of the semiconductor wafer based, at least in part, on the surface barrier voltage.Type: GrantFiled: February 26, 2016Date of Patent: September 1, 2020Assignee: SEMILAB Semiconductor Physics Laboratory Co., Ltd.Inventors: Dmitriy Marinskiy, Thye Chong Loy, Jacek Lagowski, Sung-Li Wang, Lin-Jung Wu, Shyh-Shin Ferng, Yi-Hung Lin, Sheng-Shin Lin
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Patent number: 10276397Abstract: The present disclosure relates to an improved method of forming interconnection layers to reduce voids and improve reliability, and an associated device. In some embodiments, a dielectric layer is formed over a semiconductor substrate having an opening arranged within the dielectric layer. A metal seed layer is formed on the surfaces of the opening using a chemical vapor deposition (CVD) process. Then a metal layer is plated onto the metal seed layer to fill the opening. Forming the metal seed layer using a CVD process provides the seed layer with a good uniformity, which allows for high aspect ratio openings in the dielectric layer to be filled without voids or pinch off.Type: GrantFiled: July 20, 2015Date of Patent: April 30, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ya-Ling Lee, Lin-Jung Wu, Victor Y. Lu
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Patent number: 10269560Abstract: A method for manufacturing semiconductor structure is disclosed. The method includes: providing a semiconductor substrate; hydrogenizing a surface of the semiconductor substrate; supplying a precursor to the surface of the semiconductor substrate; and supplying a reactant to the surface of the semiconductor substrate. An associated method for performing an atomic layer deposition (ALD) upon a semiconductor substrate and an associated atomic layer deposition (ALD) method are also disclosed.Type: GrantFiled: June 15, 2016Date of Patent: April 23, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yun-Tzu Chiu, Hsueh-Hui Kuo, Lin-Jung Wu, Chih-Tsung Lee
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Patent number: 10121653Abstract: The present disclosure relates to a method and apparatus for performing a plasma enhanced ALD (PEALD) process that provides for improved step coverage. The process introduces a precursor gas into a processing chamber comprising a semiconductor workpiece. The first gas is ionized to form a plurality of ionized precursor molecules. A bias voltage is subsequently applied to the workpiece. The bias voltage attracts the ionized precursor molecules to the workpiece, so as to provide anisotropic coverage of the workpiece with the precursor gas. A reactant gas is introduced into the processing chamber. A plasma is subsequently ignited from the reactant gas, causing the reactant gas to react with the ionized precursor molecules that have been deposited onto the substrate to form a deposited layer on the workpiece.Type: GrantFiled: September 22, 2015Date of Patent: November 6, 2018Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Lin-Jung Wu, Su-Horng Lin, Chi-Ming Yang
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Patent number: 9869018Abstract: A method of solid precursor delivery for a vapor deposition process is provided. In some embodiments, a precursor ampoule is provided including a solid precursor arranged in the precursor ampoule. A solvent is added to the precursor ampoule including one or more ionic liquids to dissolve chemical species of the solid precursor and to form a liquid precursor. A carrier gas is applied into the liquid precursor through an inlet of the precursor ampoule. A gas precursor is generated at an upper region of the precursor ampoule by vaporization of the liquid precursor. The chemical species of the solid precursor are delivered into a vapor deposition chamber by the carrier gas. The chemical species of the solid precursor is deposited onto a substrate within the vapor deposition chamber.Type: GrantFiled: April 26, 2016Date of Patent: January 16, 2018Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chung-Chieh Lee, Chi-Ming Yang, Lin-Jung Wu
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Publication number: 20170365483Abstract: A method for manufacturing semiconductor structure is disclosed. The method includes: providing a semiconductor substrate; hydrogenizing a surface of the semiconductor substrate; supplying a precursor to the surface of the semiconductor substrate; and supplying a reactant to the surface of the semiconductor substrate. An associated method for performing an atomic layer deposition (ALD) upon a semiconductor substrate and an associated atomic layer deposition (ALD) method are also disclosed.Type: ApplicationFiled: June 15, 2016Publication date: December 21, 2017Inventors: YUN-TZU CHIU, HSUEH-HUI KUO, LIN-JUNG WU, CHIH-TSUNG LEE
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Publication number: 20170306485Abstract: A method of solid precursor delivery for a vapor deposition process is provided. In some embodiments, a precursor ampoule is provided including a solid precursor arranged in the precursor ampoule. A solvent is added to the precursor ampoule including one or more ionic liquids to dissolve chemical species of the solid precursor and to form a liquid precursor. A carrier gas is applied into the liquid precursor through an inlet of the precursor ampoule. A gas precursor is generated at an upper region of the precursor ampoule by vaporization of the liquid precursor. The chemical species of the solid precursor are delivered into a vapor deposition chamber by the carrier gas. The chemical species of the solid precursor is deposited onto a substrate within the vapor deposition chamber.Type: ApplicationFiled: April 26, 2016Publication date: October 26, 2017Inventors: Chung-Chieh Lee, Chi-Ming Yang, Lin-Jung Wu
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Publication number: 20170005038Abstract: The present disclosure relates to an improved method of forming interconnection layers to reduce voids and improve reliability, and an associated device. In some embodiments, a dielectric layer is formed over a semiconductor substrate having an opening arranged within the dielectric layer. A metal seed layer is formed on the surfaces of the opening using a chemical vapor deposition (CVD) process. Then a metal layer is plated onto the metal seed layer to fill the opening. Forming the metal seed layer using a CVD process provides the seed layer with a good uniformity, which allows for high aspect ratio openings in the dielectric layer to be filled without voids or pinch off.Type: ApplicationFiled: July 20, 2015Publication date: January 5, 2017Inventors: Ya-Ling Lee, Lin-Jung Wu, Victor Y. Lu
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Patent number: 9530617Abstract: Some embodiments relate to a method for semiconductor processing. In this method, a semiconductor wafer is provided. A surface region of the semiconductor wafer is probed to determine whether excess charge is present on the surface region. Based on whether excess charge is present, selectively inducing a corona discharge to reduce the excess charge. Other techniques are also provided.Type: GrantFiled: January 30, 2013Date of Patent: December 27, 2016Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Lin-Jung Wu, Jyh-Shiou Hsu, Chi-Ming Yang
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Publication number: 20160252565Abstract: An example semiconductor wafer includes a semiconductor layer, a dielectric layer disposed on the semiconductor layer, and a layer of the metal disposed on the dielectric layer. An example method of determining an effective work function of a metal on the semiconductor wafer includes determining a surface barrier voltage of the semiconductor wafer, and determining a metal effective work function of the semiconductor wafer based, at least in part, on the surface barrier voltage.Type: ApplicationFiled: February 26, 2016Publication date: September 1, 2016Inventors: Dmitriy Marinskiy, Thye Chong Loy, Jacek Lagowski, Sung-Li Wang, Lin-Jung Wu, Shyh-Shin Ferng, Yi-Hung Lin, Sheng-Shin Lin
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Patent number: 9331168Abstract: Some embodiments of the present disclosure provide a semiconductor structure. The semiconductor structure includes a substrate, a high k dielectric layer disposed over the substrate, and a gate layer over the high k dielectric layer. The high k dielectric layer is partially crystallized and comprising an average thickness of from about 10 ? to about 30 ?. Some embodiments of the present disclosure provide a method for manufacturing a semiconductor structure. The method includes (i) forming a high k dielectric layer with a thickness of from about 10 ? to about 30 ? over a substrate, (ii) forming a gate layer over the dielectric layer, and (iii) transforming at least a portion of the dielectric layer from a first phase to a second phase by microwave irradiation.Type: GrantFiled: January 17, 2014Date of Patent: May 3, 2016Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Su-Horng Lin, Lin-Jung Wu
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Publication number: 20160013043Abstract: The present disclosure relates to a method and apparatus for performing a plasma enhanced ALD (PEALD) process that provides for improved step coverage. The process introduces a precursor gas into a processing chamber comprising a semiconductor workpiece. The first gas is ionized to from a plurality of ionized precursor molecules. A bias voltage is subsequently applied to the workpiece. The bias voltage attracts the ionized precursor molecules to the workpiece, so as to provide anisotropic coverage of the workpiece with the precursor gas. A reactant gas is introduced into the processing chamber. A plasma is subsequently ignited from the reactant gas, causing the reactant gas to react with the ionized precursor molecules that have been deposited onto the substrate to form a deposited layer on the workpiece.Type: ApplicationFiled: September 22, 2015Publication date: January 14, 2016Inventors: Lin-Jung Wu, Su-Horng Lin, Chi-Ming Yang
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Patent number: 9184045Abstract: The present disclosure relates to a method and apparatus for performing a plasma enhanced ALD (PEALD) process that provides for improved step coverage. The process introduces a precursor gas into a processing chamber comprising a semiconductor workpiece. The first gas is ionized to from a plurality of ionized precursor molecules. A bias voltage is subsequently applied to the workpiece. The bias voltage attracts the ionized precursor molecules to the workpiece, so as to provide anisotropic coverage of the workpiece with the precursor gas. A reactant gas is introduced into the processing chamber. A plasma is subsequently ignited from the reactant gas, causing the reactant gas to react with the ionized precursor molecules that have been deposited onto the substrate to form a deposited layer on the workpiece.Type: GrantFiled: February 8, 2013Date of Patent: November 10, 2015Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Lin-Jung Wu, Su-Horng Lin, Chi-Ming Yang
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Publication number: 20150206951Abstract: Some embodiments of the present disclosure provide a semiconductor structure. The semiconductor structure includes a substrate, a high k dielectric layer disposed over the substrate, and a gate layer over the high k dielectric layer. The high k dielectric layer is partially crystallized and comprising an average thickness of from about 10 ? to about 30 ?. Some embodiments of the present disclosure provide a method for manufacturing a semiconductor structure. The method includes (i) forming a high k dielectric layer with a thickness of from about 10 ? to about 30 ? over a substrate, (ii) forming a gate layer over the dielectric layer, and (iii) transforming at least a portion of the dielectric layer from a first phase to a second phase by microwave irradiation.Type: ApplicationFiled: January 17, 2014Publication date: July 23, 2015Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: SU-HORNG LIN, LIN-JUNG WU
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Publication number: 20140227861Abstract: The present disclosure relates to a method and apparatus for performing a plasma enhanced ALD (PEALD) process that provides for improved step coverage. The process introduces a precursor gas into a processing chamber comprising a semiconductor workpiece. The first gas is ionized to from a plurality of ionized precursor molecules. A bias voltage is subsequently applied to the workpiece. The bias voltage attracts the ionized precursor molecules to the workpiece, so as to provide anisotropic coverage of the workpiece with the precursor gas. A reactant gas is introduced into the processing chamber. A plasma is subsequently ignited from the reactant gas, causing the reactant gas to react with the ionized precursor molecules that have been deposited onto the substrate to form a deposited layer on the workpiece.Type: ApplicationFiled: February 8, 2013Publication date: August 14, 2014Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Lin-Jung Wu, Su-Horng Lin, Chi-Ming Yang
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Publication number: 20140210506Abstract: Some embodiments relate to a method for semiconductor processing. In this method, a semiconductor wafer is provided. A surface region of the semiconductor wafer is probed to determine whether excess charge is present on the surface region. Based on whether excess charge is present, selectively inducing a corona discharge to reduce the excess charge. Other techniques are also provided.Type: ApplicationFiled: January 30, 2013Publication date: July 31, 2014Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Lin-Jung Wu, Jyh-Shiou Hsu, Chi-Ming Yang
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Patent number: 8623468Abstract: Methods of fabricating a metal hard mask and a metal hard mask fabricated by such methods are described. The method includes flowing at least one metal reactant gas into a reaction chamber configured to perform chemical vapor deposition (CVD), wherein the at least one metal reactant gas includes a metal-halogen gas or a metal-organic gas. The method further includes depositing a hard mask metal layer by CVD using the at least one metal reactant gas.Type: GrantFiled: January 5, 2012Date of Patent: January 7, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Su-Horng Lin, Lin-Jung Wu, Chi-Ming Yang, Chin-Hsiang Lin
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Publication number: 20130174982Abstract: The present disclosure provides for methods of fabricating a metal hard mask and a metal hard mask fabricated by such methods. A method includes flowing at least one metal reactant gas into a reaction chamber configured to perform chemical vapor deposition (CVD), wherein the at least one metal reactant gas includes a metal-halogen gas or a metal-organic gas. The method further includes depositing a hard mask metal layer by CVD using the at least one metal reactant gas.Type: ApplicationFiled: January 5, 2012Publication date: July 11, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Su-Horng Lin, Lin-Jung Wu, Chi-Ming Yang, Chin-Hsiang Lin