Patents by Inventor Lin Yu-Ting

Lin Yu-Ting has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Bump pattern design for flip chip semiconductor package
    Patent number: 7446398
    Abstract: A bump pattern design for flip chip semiconductor packages includes a pattern of contact pads formed on a package substrate. Each contact pad is adapted to receive a corresponding solder bump from a semiconductor chip attached thereto. The pattern includes a central portion and a peripheral portion with a transition portion therebetween. The transition portion has a lower pattern density than the central portion and peripheral portions. In the peripheral portion is at least one outer portion having a pattern density less than the average pattern density of the central portion. The outer portions of reduced pattern density may be the corner sections in a rectangular bump pattern and may further include channels that are void of contact pads. The peripheral portion may include an average pitch between most of the rows and columns, but also an increased pitch between some adjacent rows and columns.
    Type: Grant
    Filed: August 1, 2006
    Date of Patent: November 4, 2008
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Pao-Kang Niu, Pei-Haw Tsao, Hao-Yi Tsai, Yung-Kuan Hsiao, Chung Yu Wang, Shang-Yun Hou, Lin Yu-Ting
  • BUMP PATTERN DESIGN FOR FLIP CHIP SEMICONDUCTOR PACKAGE
    Publication number: 20080029876
    Abstract: A bump pattern design for flip chip semiconductor packages includes a pattern of contact pads formed on a package substrate. Each contact pad is adapted to receive a corresponding solder bump from a semiconductor chip attached thereto. The pattern includes a central portion and a peripheral portion with a transition portion therebetween. The transition portion has a lower pattern density than the central portion and peripheral portions. In the peripheral portion is at least one outer portion having a pattern density less than the average pattern density of the central portion. The outer portions of reduced pattern density may be the corner sections in a rectangular bump pattern and may further include channels that are void of contact pads. The peripheral portion may include an average pitch between most of the rows and columns, but also an increased pitch between some adjacent rows and columns.
    Type: Application
    Filed: August 1, 2006
    Publication date: February 7, 2008
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Pao-Kang Niu, Pei-Haw Tsao, Hao-Yi Tsai, Yung-Kuan Hsiao, Chung Yu Wang, Shang-Yun Hou, Lin Yu-Ting